|
Volumn , Issue , 2010, Pages
|
Statistical modeling and post manufacturing configuration for scaled analog CMOS
|
Author keywords
[No Author keywords available]
|
Indexed keywords
ADVANCED CMOS;
ANALOG CMOS;
ANALOG DESIGN;
CIRCUIT ELEMENTS;
CORE CIRCUIT;
DESIGN CHALLENGES;
ELEMENT SELECTION;
ORDER OF MAGNITUDE;
PROCESS VARIATION;
STATISTICAL MODELING;
TEST CHIPS;
CMOS INTEGRATED CIRCUITS;
COMPARATORS (OPTICAL);
INTEGRATED CIRCUIT MANUFACTURE;
INTEGRATED CIRCUITS;
DESIGN;
|
EID: 78649852132
PISSN: 08865930
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/CICC.2010.5617625 Document Type: Conference Paper |
Times cited : (24)
|
References (5)
|