The TDDB failure mode and its engineering study for 45NM and beyond in porous low k dielectrics direct polish scheme

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2010, Pages 918-921

  Hsu, Chia Lin ^a,b   Lu, Kuan Ting ^b   Lin, Wen Chin ^b   Lin, Jeh Chieh ^b   Chen, Chih Hsien ^b   Tsai, Teng Chun ^b   Huang, Climbing ^b   Wu, J Y ^b   Perng, Dung Ching ^a  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

^b UNITED MICROELECTRONICS CORPORATION   (Taiwan)

Author keywords

Cu interconnect; Direct polish; Failure mode; Low k; TDDB; Time dependent dielectric breakdown

Indexed keywords

CU INTERCONNECT; DIRECT POLISH; LOW K; TDDB; TIME-DEPENDENT DIELECTRIC BREAKDOWN;

COPPER; DIELECTRIC MATERIALS; ELECTRIC BREAKDOWN; RELIABILITY ANALYSIS; SAFETY ENGINEERING; SILICA;

FAILURE MODES;

EID: 77957923725     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2010.5488707     Document Type: Conference Paper

References (4)

1. Jinyoung Kim, et al., "Time Dependent Dielectric Breakdown Characteristics of Low-k Dielectric (SiOC) Over a Wide Range of Test Areas and Electric Fields" in Proceedings of the 2007 IEEE International Reliability Physics Symposium, 2007, pp. 399-404.
2. F. Chen, et al, "Line Edge Roughness and Spacing Effect on Low-k TDDB Characteristics," in Proceedings of the 2008 IEEE International Reliability Physics Symposium, 2008, pp. 132-137.
3. Gaddi S. Haase, "An Alternative Model For Interconnect Low-K Dielectric Lifetime Dependence On Voltage" in Proceedings of the 2008 IEEE International Reliability Physics Symposium, 2008, pp. 556-565.
4. Chia Lin Hsu, et al., "Defect Study of Manufacturing Feasible Porous Low k Dielectrics Direct Polish for 45nm Technology and beyond," in Proceedings of the 2009 IEEE International Interconnect Technology Conference, 2009, pp. 140-142.