Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2010, Pages 532-535

  Morassi, L ^a   Verzellesi, G ^a   Padovani, A ^a   Larcher, L ^a   Pavan, P ^a   Veksler, D ^b   Ok, Injo ^b   Bersuker, G ^b  

^a UNIVERSITY OF MODENA AND REGGIO EMILIA   (Italy)

^b SEMATECH   (United States)

Author keywords

High k dielectric; III V MOSFETs; InGaAs; Interface traps; Numerical simulation

Indexed keywords

HIGH-K DIELECTRIC; INGAAS; INTERFACE TRAPS; MOSFETS; NUMERICAL SIMULATION;

COMPUTER SIMULATION; GATE DIELECTRICS; GATES (TRANSISTOR); MOSFET DEVICES; SEMICONDUCTING INDIUM;

GALLIUM;

EID: 77957915765     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2010.5488774     Document Type: Conference Paper

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