Optimum bias of CMOS organic field effect transistor inverter through threshold adjustment of both p- and n-type devices

Electronics Letters

Volumn 46, Issue 19, 2010, Pages 1335-1336

  Dhar, B M ^a   Ozgun R ^a   Jung, B J ^a   Katz, H E ^a   Andreou, A G ^a  

^a Johns Hopkins University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INVERTERS; HYBRID FABRICATION; MAXIMUM GAIN; NEGATIVE CHARGE; ORGANIC FET; P-TYPE;

ELECTRON MULTIPLIERS; FABRICATION; FIELD EFFECT TRANSISTORS; PHOTOLITHOGRAPHY;

ORGANIC FIELD EFFECT TRANSISTORS;

EID: 77956821911     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el.2010.1603     Document Type: Article

References (12)

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