Notice of Removal: Design of monolithic low dropout regulator for wireless powered brain cortical implants using a line ripple rejection technique

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 57, Issue 9, 2010, Pages 686-690

  Zheng, Chen ^a   Ma, Dongsheng ^a  

^a University of Arizona   (United States)

Author keywords

Dynamic voltage scaling (DVS); line regulation; line ripple rejection (LRR); low dropout (LDO) regulator

Indexed keywords

BRAIN; TRANSIENT ANALYSIS; VOLTAGE REGULATORS; VOLTAGE SCALING;

COMPENSATION CAPACITORS; DYNAMIC VOLTAGE SCALING (DVS); FAST TRANSIENT RESPONSE; LINE REGULATION; LINE RIPPLE REJECTION (LRR); LOW DROPOUT REGULATOR; LOW-DROPOUT REGULATORS; POWER SUPPLY REJECTION RATIO;

ELECTRIC CURRENT REGULATORS;

EID: 77956673528     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2010.2056090     Document Type: TB

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