ILP modelling of the common subexpression sharing problem

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 3, Issue , 2002, Pages 1171-1174

  Gustafsson, Oscar ^a   Wanhammar, Lars ^a  

^a LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

COMMON SUBEXPRESSION SHARING; DESIGN OF ALGORITHMS; GRAPH REPRESENTATION; INTEGER LINEAR PROGRAMMING; LINEAR DESIGN; LINEAR-PHASE FIR FILTERS; OPTIMAL METHODS; OPTIMAL SOLUTIONS; SUBEXPRESSION SHARING; SUM OF PRODUCTS;

FIR FILTERS; INTEGER PROGRAMMING;

OPTIMIZATION;

EID: 77956422478     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2002.1046461     Document Type: Conference Paper

References (13)

1. D. R. Bull and D. H. Horrocks, "Primitive operator digital filters," IEE Proc. G, vol. 138, pp. 401-412, June 1991.
2. A. G. Dempster and M. D. Macleod, "Use of minimumadder multiplier blocks in FIR digital filters," IEEE Trans. Circuits Syst. II, vol.42,pp. 569-577, Sept. 1995.
3. M. Mehendale, S. D. Sherlakar, and G. Vekantesh, "Synthesis of multiplierless FIR filters with minimum number of additions," Proc. IEE/ACM Int. Conf. Computer-Aided Design, Los Alamitos, CA, 1995, pp. 668-671.
4. M. Potkonjak, M. B. Shrivasta, and A. P. Cbandrakasan, "Multiple constant multiplication: Efficient and versatile framework and algorithms for exploring common subexpression elimination," IEEE Trans. Computer-Aided Design, vol. 15, pp. 151-161, Feb. 1996.
5. R. I. Hmley, "Subexpression sharing in filters using canonic signed digit multipliers," IEEE Trans. Circuits Syst. II, vol.43, pp.677-688, Oct. 1996.
6. R. Pasko, P. Schaumont, V. Derudder, S. Vernalde, and D. Durackova, "A new algorithm for elimination of common subexoressions," IEEE Trans. Comouter- Aided Design, vol.18, pp. 5848, Jan. 1999.
7. A. Yurdakul and G. Dündar, "Multiplierless realization of linear DSP transforms by using common two-term expressions," J. VLSI Signal Processing, vol.22, pp. 163-172, Sept. 1999.
8. O. Gustafsson, H. Johansson, and L. Wanhammar, "An MILP approach for the design of linear-phase FIR filters with minimum number of signed-power-of-two terms", European ConJ Circuit Theory Design, Espoo, Finland, Aug. 28-31,2001.
9. K. Hwang, Computer Arithmetic: Principle, Architecture, and Design, New York Wiley, 1979.
10. A. G. Dempster and M. D. Macleod, "Constant integer multiplication using minimum adders," IEE Proc. Circuits Devices Syst., vol.141, no.6, pp. 407-413,Oct. 1994.
11. O. Gustafsson, A. G. Dempster, and L. Wanhammar, "Extended results for minimum-adder constant integer multipliers," IEEE Int. Symp. Circuits Syst., Phoenix, AZ, May 26-29,2002.
12. Y. C. Lim and S. R. Parker, "Discrete coefficient FIR digital filter design based upon an LMS criteria," IEEE Trans. Circuits Syst., vol.30, pp. 723-739, Oct. 1983.
13. A. G. Dempster, S. S. Demirsoy, andI. Kale, "Designing multiplier blocks with low logic depth," IEEE Int. Symp. Circuits Syst., Phoenix, AZ, May 26-29,2002.