Power aware data type refinement on the HIPERLAN/2

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 1, Issue , 2003, Pages 216-219

  Dimitroulakos, G ^a   Milidonis, A ^a   Galanis, M D ^a   Theodoridis, G ^b   Goutis, C E ^a   Catthoor, F ^c  

^a UNIVERSITY OF PATRAS   (Greece)

^b Physics Department   (Greece)

^c IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

DATA LINK CONTROL; DATA TYPE; ENERGY CONSUMPTION; HIPERLAN; HIPERLAN/2; MEMORY ACCESS; MEMORY ARCHITECTURE; POWER-AWARE; SPECIFICATION CODE; STATIC AND DYNAMIC ANALYSIS; TIME CONSTRAINTS; MEMORY ENERGIES; SYSTEM MEMORY;

DATA STRUCTURES; DYNAMIC ANALYSIS; ENERGY UTILIZATION; DIGITAL STORAGE; POWER MANAGEMENT; SPECIFICATIONS;

SPECIFICATIONS; MEMORY ARCHITECTURE;

EID: 77956044342     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2003.1302015     Document Type: Conference Paper

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