-
2
-
-
0033358774
-
System-Level Power Optimization: Techniques and Tools
-
San Diego, Calif., Aug.
-
L. Benini and G. De Micheli, "System-Level Power Optimization: Techniques and Tools," ISLPED-99: ACM/IEEE Int'l Symp. Low Power Electronics and Design, San Diego, Calif., Aug. 1999, pp. 288-293.
-
(1999)
ISLPED-99: ACM/IEEE Int'l Symp. Low Power Electronics and Design
, pp. 288-293
-
-
Benini, L.1
De Micheli, G.2
-
3
-
-
0029235765
-
Memory Segmentation to Exploit Sleep Mode Operation
-
San Francisco, Calif., June
-
A. Farrahi, G. Tellez, and M. Sarrafzadeh, "Memory Segmentation to Exploit Sleep Mode Operation," DAC-32: ACM/IEEE Design Automation Conf., San Francisco, Calif., June 1995, pp. 36-41.
-
(1995)
DAC-32: ACM/IEEE Design Automation Conf.
, pp. 36-41
-
-
Farrahi, A.1
Tellez, G.2
Sarrafzadeh, M.3
-
4
-
-
0003913538
-
-
Kluwer
-
F. Catthoor, S. Wuytack, E. De Greet, F. Balasa, L. Nacthergaele, and A. Vandecappelle, Custom Memory Management Methodology: Exploration of Memory Organization for Embedded Multimedia System Design. Kluwer, 1998.
-
(1998)
Custom Memory Management Methodology: Exploration of Memory Organization for Embedded Multimedia System Design
-
-
Catthoor, F.1
Wuytack, S.2
De Greet, E.3
Balasa, F.4
Nacthergaele, L.5
Vandecappelle, A.6
-
5
-
-
0030684367
-
Analytical Energy Dissipation Models for Low Power Caches
-
Monterey, Calif., Aug.
-
M. Kamble and K. Ghose, "Analytical Energy Dissipation Models for Low Power Caches," ISLPED-97: ACM/IEEE Int'l Symp. Low Power Electronics and Design, Monterey, Calif., Aug. 1997, pp. 143-148.
-
(1997)
ISLPED-97: ACM/IEEE Int'l Symp. Low Power Electronics and Design
, pp. 143-148
-
-
Kamble, M.1
Ghose, K.2
-
6
-
-
0030149507
-
CACTI: An Enhanced Cache Access and Cycle Time Model
-
May
-
S.J.E. Wilton and N.P. Jouppi, "CACTI: An Enhanced Cache Access and Cycle Time Model," IEEE J. Solid-State Circuits, vol. 31, no. 5, pp. 677-687, May 1996.
-
(1996)
IEEE J. Solid-State Circuits
, vol.31
, Issue.5
, pp. 677-687
-
-
Wilton, S.J.E.1
Jouppi, N.P.2
-
7
-
-
0032097825
-
Energy Optimization of Multilevel Cache Architectures for RISC and CISC Processors
-
June
-
U. Ko and P. Balsara, "Energy Optimization of Multilevel Cache Architectures for RISC and CISC Processors," IEEE Trans. VLSI Systems, vol. 6, no. 2, pp. 299-308, June 1998.
-
(1998)
IEEE Trans. VLSI Systems
, vol.6
, Issue.2
, pp. 299-308
-
-
Ko, U.1
Balsara, P.2
-
8
-
-
0029325643
-
A Tutorial on MPEG/Audio Compression
-
Summer
-
D. Pan, "A Tutorial on MPEG/Audio Compression," IEEE Multimedia, vol. 2, no. 2, pp. 60-74, Summer 1995.
-
(1995)
IEEE Multimedia
, vol.2
, Issue.2
, pp. 60-74
-
-
Pan, D.1
-
9
-
-
0027640963
-
Cache Performance of the SPEC Benchmark Suite
-
Aug.
-
J.D. Gee, M.D. Hill, D.N. Pnevmatikatos, and A.J. Smith, "Cache Performance of the SPEC Benchmark Suite," IEEE Micro, vol. 3, no. 2, pp. 17-27, Aug. 1993.
-
(1993)
IEEE Micro
, vol.3
, Issue.2
, pp. 17-27
-
-
Gee, J.D.1
Hill, M.D.2
Pnevmatikatos, D.N.3
Smith, A.J.4
-
10
-
-
0004255753
-
Overview of the Ptolemy Project
-
Dept. of EECS, Univ. of California, Berkeley, July
-
J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E.A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay, and Y. Xiong, "Overview of the Ptolemy Project," ERL Technical Report UCB/ERL no. M99/37, Dept. of EECS, Univ. of California, Berkeley, July 1999.
-
(1999)
ERL Technical Report UCB/ERL No. M99/37
-
-
Davis J. II1
Goel, M.2
Hylands, C.3
Kienhuis, B.4
Lee, E.A.5
Liu, J.6
Liu, X.7
Muliadi, L.8
Neuendorffer, S.9
Reekie, J.10
Smyth, N.11
Tsay, J.12
Xiong, Y.13
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