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Volumn , Issue , 2010, Pages 3837-3840

Energy-efficient asynchronous delay element with wide controllability

Author keywords

[No Author keywords available]

Indexed keywords

CONTROL CURRENT; DELAY CELL; DELAY ELEMENTS; DIGITAL APPLICATIONS; ENERGY EFFICIENT; ENERGY REDUCTION; HIGH-SPEED;

EID: 77956007475     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2010.5537714     Document Type: Conference Paper
Times cited : (20)

References (9)
  • 1
    • 0024091885 scopus 로고
    • A variable delay line PLL for CPU coprocessor synchronization
    • Oct.
    • M.G. Johnson and E.L. Hudson, "A variable delay line PLL for CPU coprocessor synchronization,"' IEEE J. Solid-State Circuits, vol. 23, no. 5, pp. 1218-1223, Oct. 1988.
    • (1988) IEEE J. Solid-State Circuits , vol.23 , Issue.5 , pp. 1218-1223
    • Johnson, M.G.1    Hudson, E.L.2
  • 3
    • 0030235194 scopus 로고    scopus 로고
    • Asynchronous FPGA architectures
    • Sept.
    • R. Payne, "Asynchronous FPGA architectures," IEEE Proc.-Comput. Digit. Tech., vol. 143, no. 5, pp. 282-286, Sept. 1996.
    • (1996) IEEE Proc.-Comput. Digit. Tech. , vol.143 , Issue.5 , pp. 282-286
    • Payne, R.1
  • 5
    • 0142185445 scopus 로고    scopus 로고
    • Continuous-time digital signal processing
    • 16 Oct.
    • Y. Tsividis, "Continuous-time digital signal processing", Electronic Letters, vol. 39, no. 21, pp. 1551-1551, 16 Oct. 2003.
    • (2003) Electronic Letters , vol.39 , Issue.21 , pp. 1551-1551
    • Tsividis, Y.1
  • 6
    • 56849098704 scopus 로고    scopus 로고
    • A Continuous-Time ADC/DSP/DAC System with No Clock and with Activity-Dependent Power Dissipation
    • B. Schell, and Y. Tsividis, "A Continuous-Time ADC/DSP/DAC System With No Clock and With Activity-Dependent Power Dissipation," IEEE J. of Solid-State Circuits, vol. 43, no. 11, pp 2472-2481, 2008.
    • (2008) IEEE J. of Solid-State Circuits , vol.43 , Issue.11 , pp. 2472-2481
    • Schell, B.1    Tsividis, Y.2
  • 7
    • 0030195866 scopus 로고    scopus 로고
    • A low-voltage, low-power CMOS delay element
    • July
    • G. Kim, "A low-voltage, low-power CMOS delay element,", IEEE J. of Solid-State Circuits, vol. 31, no. 7, pp. 966-971, July 1996.
    • (1996) IEEE J. of Solid-State Circuits , vol.31 , Issue.7 , pp. 966-971
    • Kim, G.1
  • 8
    • 42649099628 scopus 로고    scopus 로고
    • A low power tunable delay element suitable for asynchronous delays of burst information
    • May
    • B. Schell and Y. Tsividis, "A low power tunable delay element suitable for asynchronous delays of burst information," IEEE J. of Solid-State Circuits, vol. 43, no.5, pp. 1227-1234, May 2008.
    • (2008) IEEE J. of Solid-State Circuits , vol.43 , Issue.5 , pp. 1227-1234
    • Schell, B.1    Tsividis, Y.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.