Log-domain time-multiplexed realization of dynamical conductance-based synapses

ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems

Volumn , Issue , 2010, Pages 2558-2561

  Yu, Theodore ^a,c   Cauwenberghs, Gert ^b,c  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF CALIFORNIA SAN DIEGO   (United States)

^c UNIVERSITY OF CALIFORNIA SAN DIEGO   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVATION DYNAMICS; ANALOG VLSI; CIRCUIT ARCHITECTURES; CIRCUIT REALIZATION; FIRST-ORDER; LINEAR DYNAMICS; LOG-DOMAIN; LOW-POWER OPERATION; MOS TRANSISTORS; NEUROMORPHIC; POST-SYNAPTIC NEURONS; SYNAPTIC CONDUCTANCE; SYNAPTIC DYNAMICS; SYNAPTIC INPUT; TIME MULTIPLEXED;

CIRCUIT SIMULATION; DYNAMICS; FABRICS; TIME DIVISION MULTIPLEXING; TRANSISTOR TRANSISTOR LOGIC CIRCUITS;

VLSI CIRCUITS;

EID: 77956000847     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2010.5537114     Document Type: Conference Paper

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