A signed spatial contrast event spike retina chip

ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems

Volumn , Issue , 2010, Pages 2438-2441

  Lenero Bardallo J A ^a   Serrano Gotarredona, T ^a   Linares Barranco, B ^a  

^a INSTITUTO DE MICROELECTRÓNICA DE SEVILLA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

ADDRESS-EVENT REPRESENTATION; AMBIENT LIGHT; BIHARMONIC OPERATORS; BIPOLAR OUTPUTS; CONTRAST COMPUTATION; LIGHT INTENSITY; MISMATCH CALIBRATION; NEIGHBOURHOOD; NORMALIZED DIFFERENCES; OUTPUT SIGNAL; RETINA CHIP; SPATIAL AVERAGE; SPATIAL CONTRAST; THRESHOLDING; VOLTAGE BIASING; WEIGHTED AVERAGES; ZERO IF;

FABRICS;

PIXELS;

EID: 77956000716     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2010.5537152     Document Type: Conference Paper

References (12)

1. M. Sivilotti, Wiring Considerations in Analog VLSI Systems with Application to Field-Programmable Networks, Ph.D. Thesis, California Institute of Technology, Pasadena CA, 1991.
2. K. Boahen and A. Andreou, "A contrast-sensitive retina with reciprocal synapses," in J. E. Moody (Ed.), Advances in neural information processing vol. 4, pp. 764-772, San Mateo CA, 1992. Morgan Kaufman.
3. J. Costas-Santos, T. Serrano-Gotarredona, R. Serrano-Gotarredona and B. Linares-Barranco, "A Spatial Contrast Retina with On-chip Calibration for Neuromorphic Spike-Based AER Vision Systems," IEEE Trans. Circuits and Systems, Part-I: Regular Papers, vol. 54, No. 7, pp. 1444-1458, July 2007.
4. G. Vicente-Sanchez, J. Velarde-Ramirez, T. Serrano-Gotarredona and B. Linares-Barranco, "A Weak-to-Strong Mismatch Model for Analog Circuit Design", Int. Journal of Analog Integrated Circuits and Signal Processing, 59, pp. 325-340, 2009.
5. S. Chen, and A. Bermak, "Arbitrated Time-To-First Spike CMOS Image Sensor with On-Chip Histogram Equalization," IEEE Trans. VLSI Systems, vol. 15, No. 3, pp. 346-357, March 2007.
6. J. A. Leñero-Bardallo et al., " A 5-Decade Dynamic Range Ambient-Light-Independent Calibrated Signed-Spatial-Contrast AER Retina with 0.1ms Latency and Optional Time-toFirst-Spike Mode," IEEE Trans. Circ. Syst., Part I, under review.
7. B. Linares-Barranco and T. Serrano-Gotarredona, "On the Design and Characterization of Femtoampere Current-Mode Circuits," IEEE Journal of Solid-State Circuits, vol. 38, No. 8, pp. 1353-1363, August 2003.
8. A. G. Andreou and K. Boahen, "Translinear Circuits in Subthreshold CMOS," Analog Integrated Circuits and Signal Processing, Kluwer, no. 9, pp. 141-166, Apr. 1996.
9. R. Serrano-Gotarredona, T. Serrano-Gotarredona, A. Acosta-Jiménez, and B. Linares-Barranco, "A Neuromorphic Cortical Layer Microchip for Spike Based Event Processing Vision Systems," IEEE Trans. on Circuits and Systems, Part-I, vol. 53, No. 12, pp. 2548-2566, Dec. 2006.
10. J. A. Leñero-Bardallo, T. Serrano-Gotarredona, and B. Linares-Barranco, "A Calibration Technique for Very Low Current and Compact Tunable Neuromorphic Cells. Application to 5-bit 20nA DACs," IEEE Trans. Circuits and Systems, Part-II: Brief Papers, vol. 55, No. 6, pp. 522-526, June 2008.
11. F. Gomez-Rodriguez, et al., "AER Tools for Communications and Debugging," IEEE Int. Symp. Circ. & Syst., pp. 3253-3256, 2006.
12. T. Delbruck. (2007, jAER open source project. Available: http://jaer.wiki.sourceforge.net