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Volumn 36, Issue 2, 2010, Pages 114-130

Analog property checkers: A DDR2 case study

Author keywords

Analog; Case study; Mixed signal; Monitoring; Property checkers; Temporal logic

Indexed keywords

ELECTRIC SIGNAL SYSTEMS; FORMAL VERIFICATION; MONITORING; SPECIFICATION LANGUAGES; TEMPORAL LOGIC;

EID: 77955713369     PISSN: 09259856     EISSN: None     Source Type: Journal    
DOI: 10.1007/s10703-009-0085-x     Document Type: Article
Times cited : (17)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.