Translation caching: Skip, don't walk (the page table)

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2010, Pages 48-59

  Barr, Thomas W ^a   Cox, Alan L ^a   Rixner, Scott ^a  

^a RICE UNIVERSITY   (United States)

Author keywords

Memory management; Page walk caching; TLB

Indexed keywords

CACHE STRUCTURE; DESIGN SPACES; DISTINCT POINTS; EXISTING STRUCTURE; INTEL PROCESSORS; MEMORY MANAGEMENT; PAGE TABLE; PROCESSOR ARCHITECTURES; TRANSLATION LOOKASIDE BUFFER; VIRTUAL ADDRESS SPACE; VIRTUAL-TO-PHYSICAL ADDRESS TRANSLATIONS;

BUFFER STORAGE; COMPUTERS; DESIGN; DYNAMIC RANDOM ACCESS STORAGE; PROGRAM TRANSLATORS; SOCIETIES AND INSTITUTIONS;

COMPUTER ARCHITECTURE;

EID: 77955012281     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1815961.1815970     Document Type: Conference Paper

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