메뉴 건너뛰기




Volumn 1, Issue , 2010, Pages 28-33

Energy-saving mechanisms in the time-triggered architecture

Author keywords

Energy efficiency; Power; Realtime; Time triggered

Indexed keywords

ARCHITECTURAL LEVELS; ARCHITECTURAL STYLE; COMPONENT LEVELS; ENERGY CONSUMPTION; ENERGY SAVING; ENERGY-SAVINGS; REAL TIME; SYSTEM LEVELS; TIME TRIGGERED; TIME-TRIGGERED ARCHITECTURES;

EID: 77954793971     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISORC.2010.33     Document Type: Conference Paper
Times cited : (2)

References (10)
  • 1
    • 33646900503 scopus 로고    scopus 로고
    • Device scaling limits of Si MOSFETs and their application dependencies
    • Frank, D., et al., Device Scaling Limits of Si MOSFETs and Their Application Dependencies. Proceedings of the IEEE, 2001. 89(3): p. 259-288.
    • (2001) Proceedings of the IEEE , vol.89 , Issue.3 , pp. 259-288
    • Frank, D.1
  • 2
    • 0141684229 scopus 로고    scopus 로고
    • The time-triggered architecture
    • (January 2003)
    • Kopetz, H. and G. Bauer, The Time-Triggered Architecture. Proceedings of the IEEE, 2003. 91(January 2003): p. 112-126.
    • (2003) Proceedings of the IEEE , vol.91 , pp. 112-126
    • Kopetz, H.1    Bauer, G.2
  • 4
    • 33947207004 scopus 로고    scopus 로고
    • Thermal modeling, analysis and management in VLSI circuits: Principles and methods
    • Pedram, M. and S. Nazarian, Thermal Modeling, Analysis and Management in VLSI Circuits: Principles and Methods. Proceedings of the IEEE, 2006. 94(8): p. 1487-1501.
    • (2006) Proceedings of the IEEE , vol.94 , Issue.8 , pp. 1487-1501
    • Pedram, M.1    Nazarian, S.2
  • 8
    • 65649122269 scopus 로고    scopus 로고
    • Device and circuit design challenges in the digital subthreshold region for ultralow-power applications
    • Article ID 283702, URL
    • Vaddi, R., S. Dasgupta, and R.P. Agarwal, Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications. VLSI Design, 2009. 2009(Article ID 283702, URL: http://www.hindawi.com/journals/ vlsi/2009/283702.html.
    • (2009) VLSI Design, 2009
    • Vaddi, R.1    Dasgupta, S.2    Agarwal, R.P.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.