3D heterogeneous opto-electronic integration technology for system-on-silicon (SOS)

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2009, Pages

  Lee, K W ^a   Noriki, A ^a   Kiyoyama, K ^a   Kanno, S ^a   Kobayashi, R ^a   Jeong, W C ^a   Bea, J C ^a   Fukushima, T ^a   Tanaka, T ^a   Koyanagi, M ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLITUDE SHIFT KEYING; HETEROGENEOUS INTEGRATION; LC FILTER; MEMS CHIPS; MICROFLUIDIC CHANNEL; OPTO-ELECTRONIC INTEGRATED SYSTEMS; OPTO-ELECTRONICS; THROUGH SILICON VIAS; VERTICAL-CAVITY SURFACE EMITTING LASER; WAFER DIRECT BONDING;

ELECTRONICS PACKAGING; ELECTROOPTICAL DEVICES; INTEGRATED OPTICS; LASERS; MOEMS; OPTOELECTRONIC DEVICES; SILICON WAFERS; SURFACE EMITTING LASERS; SYSTEMS ENGINEERING; THREE DIMENSIONAL; WAFER BONDING;

ELECTRON DEVICES;

EID: 77952386756     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2009.5424305     Document Type: Conference Paper

References (6)

1. N. Sillon, S.Cheramy et al., " New trends in wafer level packaging," IITC, pp. 211-213, 2009
2. M.J. Wolf, H. Reichl et al., "Technologies for 3D Wafer Level Heterogeneous Integration", DTIP of MEMS/MOEMS 2008, pp. 123-126, 2008
3. T. Fukushima, M. Koyanagi et al., "New Heterogeneous Multi-Chip Module Integration Technology Using Self-Assembly Method", IEDM, pp. 499-502, 2008
4. A. Noriki, M. Koyanagi et al., "Optical Interposer Technology using Buried VCSEL and Tapered TSV for High-Speed Chip-to-Chip Optical Interconnection", JJAP, 48, 04C113, 2009
5. M. Murugesan, M. Koyanagi et al., "The formation of Lateral Interconnections Extending over 100-mm-Thick Chips" Extended Abs. of SSDM Sep. 2008, pp. 472-473
6. M. Murugesan, M. Koyanagi et al., M., "Cu lateral interconnects formed between 100-μm-thick self-assembled chips on flexible substrates" ECTC, pp. 1496-1501, 2009