A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 53, Issue , 2010, Pages 266-267

  Chang, Meng Fan ^a   Yang, Shu Meng ^a   Liang, Chih Wei ^a   Chiang, Chih Chyuang ^a   Chiu, Pi Feng ^a   Lin, Ku Feng ^a   Chu, Yuan Hua ^b   Wu, Wen Chin ^b   Yamauchi, Hiroyuki ^c  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

^b INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

^c FUKUOKA INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

90NM CMOS; AREA PENALTY; BIOMEDICAL APPLICATIONS; BIT LINES; CHARGE SHARING; DRIVING SOURCE; EMBEDDED ROM; LOW-VOLTAGE; LOWER-POWER CONSUMPTION; NOISE SOURCE; PRE-CHARGE; SENSING MARGIN; SMALL AREA; ULTRA-LOW-VOLTAGE;

ROM;

EID: 77952228218     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2010.5433914     Document Type: Conference Paper

References (8)

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