A 59.5mW scalable/multi-view video decoder chip for quad/3D full HDTV and video streaming applications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 53, Issue , 2010, Pages 330-331

  Chuang, Tzu Der ^a   Tsung, Pei Kuei ^a   Lin, Pin Chih ^a   Chang, Lo Mei ^a   Ma, Tsung Chuan ^a   Chen, Yi Hau ^a   Chen, Liang Gee ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

FULL HD; MULTIMEDIA APPLICATIONS; PERCEPTUAL EXPERIENCE; VIDEO CODING TECHNOLOGY; VIDEO DECODERS;

DIGITAL TELEVISION; IMAGE CODING; TELEVISION BROADCASTING; VIDEOTEX; VISUAL COMMUNICATION;

ACOUSTIC STREAMING;

EID: 77952120530     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2010.5433908     Document Type: Conference Paper

References (5)

1. Y. C. Yang, et al., "High-Throughput H.264/AVC High Profile CABAC Decoder for HDTV Applications", IEEE Trans. CSVT, vol. 19, pp. 1395-1399, Sept., 2009.
2. C. C. Lin, et al., "A 160kGate 4.5kB SRAM H.264 Video Decoder for HDTV Applications," ISSCC Dig. Tech. Papers, pp. 406-407, Feb., 2006.
3. T. M. Liu, et al., "A 125 μW, Fully Scalable MPEG-2 and H.264/AVC Video Decoder for Mobile Applications," ISSCC Dig. Tech. Papers, pp. 402-403, Feb., 2006.
4. C. D. Chien, et al., "A 252kgate/71mW Multi-Standard Multi-Channel Video Decoder for High Definition Video Applications," ISSCC Dig. Tech. Papers, pp. 282-283, Feb., 2007.
5. D. Zhou, et al., "A 1080p@60fps multi-standard video decoder chip designed for power and cost efficiency in a system perspective," Symposium on VLSI Circuit, pp. 262-263, June, 2009.