Reconfigurable asynchronous logic automata: (RALA)

Conference Record of the Annual ACM Symposium on Principles of Programming Languages

Volumn , Issue , 2010, Pages 1-6

  Gershenfeld, Neil ^a   Dalrymple, David ^a   Chen, Kailiang ^a   Knaian, Ara ^a   Green, Forrest ^a   Demaine, Erik D ^a   Greenwald, Scott ^a   Schmidt Nielsen, Peter ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Asynchronous; Automata; Logic; Reconfigurable

Indexed keywords

ABSTRACT SYMBOLS; ASYNCHRONOUS AUTOMATA; ASYNCHRONOUS LOGIC; COMPUTER PROGRAM; COMPUTING DEVICES; PHYSICAL RESOURCES; RE-CONFIGURABLE; UNDERLYING MECHANISM;

COMPUTER SOFTWARE; LINGUISTICS; TRANSLATION (LANGUAGES);

ROBOTS;

EID: 77950880271     PISSN: 07308566     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1706299.1706301     Document Type: Conference Paper

References (42)

1. H. Abelson, D. Allen, D. Coore, C. Hanson, G. Homsy, T. F. Knight, Jr., R. Nagpal, E. Rauch, G. J. Sussman, and R. Ron Weiss. Amorphous computing. Commun. ACM, 43:74-82, 2000.
2. S. Adachi, F. Peper, and J. Lee. Computation by asynchronously updating cellular automata. Journal of Statistical Physics, 114:261-289, 2004.
3. Arvind and D. E. Culler. Dataflow architectures. Annual Reviews of Computer Science, pages 225-253, 1986.
4. D. Averin and K. Likharev. Coulomb blockade of single-electron tunneling, and coherent oscillations in small tunnel junctions. J. Low Temp. Phys., 62:345-373, 1986.
5. R. Banks. Information Processing and Transmission in Cellular Automata. PhD thesis, MIT, 1971.
6. A. Barenco, C. H. Bennett, R. Cleve, D. P. DiVincenzo, N. Margolus, P. Shor, T. Sleator, J. Smolin, and H. Weinfurter. Elementary gates for quantum computation. Phys. Rev. A, 52:3457-3467, 1995.
7. C. Bennett. Time/space trade-offs for reversible computation. Siam J. Comput., 18:766-776, 1989.
8. G. Birtwistle and A. Davis, editors. Asynchronous Digital Circuit Design. Springer-Verlag, New York, 1995.
9. W. Butera. Programming a Paintable Computer. PhD thesis, MIT, 2002.
10. K. Chen, L. Leu, , and N. Gershenfeld. Analog logic automata. In Proceedings of the IEEE Biomedical Circuits and Systems Conference (BioCAS), pages 189-192, 2008.
11. K. Chen, F. Green, and N. Gershenfeld. Asynchronous logic automata asic design. Preprint, 2009.
12. K. C. Cheung, E. D. Demaine, and S. Griffith. Programmed assembly with universally foldable strings. Preprint, 2009.
13. D. Dalrymple, N. Gershenfeld, and K. Chen. Asynchronous logic automata. In Proceedings of AUTOMATA 2008, pages 313-322, 2008.
14. J. Dennis. Data flow supercomputers. Computer, 13:48-56, 1980.
15. EE Times, 2009. March 17.
16. M. Frank, C. Vieri, M. J. Ammer, N. Love, N. Margolus, and T. Knight, Jr. A scalable reversible computer in silicon. In C. Calude, J. Casti, and M. Dineen, editors, Unconventional Models of Computation, pages 183-200, Berlin, 1998. Springer.
17. S. Greenwald, B. Haeupler, and N. Gershenfeld. Mathematical operations in asynchronous logic automata. Preprint, 2009.
18. S. Hassoun and T. Sasao, editors. Logic Synthesis and Verification. Kluwer Academic Publishers, Norwell, MA, 2002.
19. F. J. Hill and G. R. Peterson. Computer Aided Logical Design with Emphasis on VLSI. Wiley, New York, 4th edition, 1993.
20. W. M. Johnston, J. P. Hanna, and R. J. Millar. Advances in dataflow programming languages. ACM Computing Surveys, 36:1-34, 2004.
21. S. Kung. Vlsi array processors. IEEE ASSP Magazine, pages 4-22, 1985.
22. S. Lloyd. Ultimate physical limits to computation. Nature, 406: 1047-1054, 2000.
23. W. Maly. Cost of silicon viewed from vlsi design perspective. In DAC '94: Proceedings of the 31st annual Design Automation Conference, pages 135-142, 1994.
24. R. Manohar. Reconfigurable asynchronous logic. In Proceedings of the IEEE Custom Integrated Circuits Conference, pages 13-20, 2006.
25. N. Margolus. Physics-like models of computation. Physica D, 10: 81-95, 1984.
26. R. Miller, T. Northup, K. Birnbaum, A. Boca, A. Boozer, and H. Kimble. Trapped atoms in cavity qed: Coupling quantized light and matter. J. Phys. B: At. Mol. Opt. Phys., 38:S551-S565, 2005.
27. M. Minsky. Computation: Finite and Infinite Machines. Prentice-Hall, Englewood Cliffs, 1967.
28. D. A. Patterson and D. R. Ditzel. The case for the reduced instruction set computer. SIGARCH Comput. Archit. News, 8:25-33, 1980.
29. P. S. Peercy. The drive to miniaturization. Nature, 406, 2000.
30. C. Petri. Nets, time and space. Theoretical Computer Science, 153: 3-48, 1996.
31. G. Popescu, P. Kunzler, and N. Gershenfeld. Digital printing of digital materials. In DF 2006 International Conference on Digital Fabrication Technologies, 2006. Denver, Colorado.
32. Proceedings of the IEEE. Special issue on asynchronous circuits and systems, 1999. 87:2.
33. J.-F. Puget and I. Lustig. Program does not equal program: Constraint programming and its relationship to mathematical programming. Interface, 31:29-53, 2001.
34. P. Schmidt-Nielsen. RALA CAD. To be published, 2009.
35. M. Sokolich, A. Kramer, Y. Boegeman, and R. Martinez. Demonstration of sub-5 ps cml ring oscillator gate delay with reduced parasitic alinas/ingaas hbt. IEEE Electron Device Letters, 22:309-311, 2001.
36. T. Toffoli and N. Margolus. Cellular Automata Machines: A New Environment for Modeling. MIT Press, Cambridge, MA, 1991.
37. A. Turing. Computing machinery and intelligence. Mind, 59:433-560, 1950.
38. G. Venkataramani, M. Budiu, T. Chelcea, and S. C. Goldstein. C to asynchronous dataflow circuits: An end-to-end toolflow. In IEEE 13th International Workshop on Logic Synthesis (IWLS), Temecula, CA, June 2004.
39. B. Vigoda, H. Dauwels, M. Frey, N. Gershenfeld, T. Koch, H.-A. Loeliger, and P. Merkli. Synchronization of pseudo-random signals by forward-only message passing with application to electronics circuits. IEEE Transactions of Information Theory, 52:3843-3852, 2006.
40. J. von Neumann. First draft of a report on the EDVAC, 1945.
41. J. von Neumann. Theory of Self-Reproducing Automata. University of Illinois Press, Urbana, 1966. Edited and completed by Arthur W. Burks.
42. H. Wang. Proving theorems by pattern recognition - II. Bell System Tech. Journal, 40:1-41, 1961.