A generic framework for soft real-time program executions on NAND flash memory in multi-tasking embedded systems

Proceedings - Real-Time Systems Symposium

Volumn , Issue , 2009, Pages 93-104

  Lee, Duhee ^a   Lee, Chang Gun ^a   Kim, Kanghee ^b  

^a Seoul National University   (South Korea)

^b SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

EXECUTION TIME; EXPERIMENTAL STUDIES; GENERIC FRAMEWORKS; HIGH PRESSURE; LOOP OPTIMIZATIONS; MULTIPLE TASKS; NAND FLASH MEMORY; NON-VOLATILE; NOVEL TECHNIQUES; OPTIMIZATION LOOP; PROGRAM DEVELOPERS; REAL TIME PROGRAMS; REAL-TIME TASKS; SCHEDULABILITY; SOFT REAL TIME; TASK ANALYSIS; TIME-TO-MARKET;

CONVEX OPTIMIZATION; EMBEDDED SYSTEMS; FLASH MEMORY; JOB ANALYSIS; MULTITASKING; NAND CIRCUITS; OPTIMIZATION; RANDOM ACCESS STORAGE; STOCHASTIC SYSTEMS;

REAL TIME SYSTEMS;

EID: 77649330201     PISSN: 10528725     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTSS.2009.33     Document Type: Conference Paper

References (29)

1. R. Arnold, F. Mueller, D. B. Whalley, and M. Harmon. Bounding Worst-Case Instruction Cache Performance. In Proc. IEEE 15th Real-Time Systems Symp., pages 172-181, Dec. 1994.
2. A.-H. Badawy, A. Aggarwal, D. Yeung, and C.-W. Tseng. The Efficacy of Software Prefetching and Locality Optimizations on Future Memory Systems. Journal of Instruction-Level Parallelism, 6, July 2004.
3. B. D. Bui, M. Caccamo, L. Sha, and J. Martinez. Impact of Cache Partitioning on Multi-Tasking Real-Time Embedded Systems. In Proc. IEEE 14th International Conference on Embedded and Real-Time Computing Systems and Applications, pages 101-110, 2008.
4. J. V. Busquets-Mataix, J. J. Serrano-Martin, R. Ors, P. Gil, and A. Wellings. Adding Instruction Cache Effect to Schedulability Analysis of Preemptive Real-Time Systems. In Proc. IEEE 2nd Real-Time Technology and Applications Symp., June 1996.
5. M. Campoy, A. P. Ivars, and J. V. Busquets-Mataix. Static use of locking caches in multitask preemptive real-time systems. In IEEE/IEE Real-time Embedded Systems Workshop, Dec. 2001.
6. L.-P. Chang and T.-W. Kuo. An Adaptive Striping Architecture for Flash Memory Storage Systems of Embedded Systems. In Proc. of IEEE Real-Time and Embedded Technology and Applications Symposium, pages 187-196, Dec. 2002.
7. L.-P. Chang, T.-W. Kuo, and S.-W. Lo. Real-Time Garbage Collection for Flash-Memory Storage Systems of Real-Time Embedded Systems. ACM Transactions on Embedded Computing Systems, 3(4):837-863, Nov. 2004.
8. J. L. Diaz, D. F. Garcia, K. Kim, C.-G. Lee, L. L. Bello, J. M. Lopez, S. L. Min, and O. Mirabella. Stochastic Analysis of Periodic Real-Time Systems. In Proc. 23rd IEEE Real-Time Systems Symp., pages 289-302, Dec. 2002.
9. S. Jain and Y.-H. Lee. A Real-Time Flash-Memory File System (RTFFS) for Embedded Applications. International Journal of Computer and Their Applications, 13(3):153-166, Sept. 2006.
10. J.-U. Kang, J.-S. Kim, C. Park, H. Park, and J. Lee. A Multi-Channel Architecture for High-Performance NAND Flash-based Storage System. Journal of Systems Architecture, 53(9):644-658, Sep. 2007.
11. J. Kim, J. M. Kim, S. H. Noh, S. L. Min, and Y. Cho. A Space-Efficient Flash Translation Layer for CompactFlash Systems. IEEE Transactions on Consumer Electronics, 48(2):366-375, May 2002.
12. J.-C. Kim, D. Lee, C.-G. Lee, K. Kim, and E.-Y. Ha. Real-Time Program Execution on NAND Flash Memory for Portable Media Players. In Proc. 29th IEEE Real-Time Systems Symp., pages 244-255, Nov. 2008.
13. D. B. Kirk. SMART (Strategic Memory Allocation for Real-Time) Cache Design. In Proc. IEEE 10th Real-Time Systems Symp., pages 229-237, Dec. 1989.
14. C. Lee, J. Lehoczky, R. Rajkumar, and D. Siewiorek. On Quality of Service Optimization with Discrete QoS Options. In Proceedings of the IEEE Real-time Technology and Applications Symposium, June 1998.
15. C.-G. Lee, J. Hahn, Y.-M. Seo, S. L. Min, R. Ha, S. Hong, C. Y. Park, M. Lee, and C. S. Kim. Analysis of Cache-related Preemption Delay in Fixed-priority Preemptive Scheduling. IEEE Transactions on Computers, 47(6):700-713, June 1998.
16. S.-S. Lim, Y. H. Bae, G. T. Jang, B.-D. Rhee, S. L. Min, C. Y. Park, H. Shin, K. Park, and C. S. Kim. An Accurate Worst Case Timing Analysis Technique for RISC Processors. In Proc. IEEE 15th Real-Time Systems Symp., pages 97-108, Dec. 1994.
17. C. Manning. Yet Another Flash File System. http://www.yaffs.net/, June 2006.
18. C. Park, J. Lim, K. Kwon, J. Lee, and S. L. Min. Compiler-Assisted Demand Paging for Embedded Systems with Flash Memory. In Proc. of the 4th ACM International Conference on Embedded Software, pages 114-124, Sept. 2004.
19. S.-Y. Park, D. Jung, J.-U. Kang, J.-S. Kim, and J. Lee. CFLRU: A Replacement Algorithm for Flash Memory. In Proc. of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, pages 234-241, Oct. 2006.
20. R. Rajkumar, C. Lee, J. Lehoczky, and D. Siewiorek. Practical Solutions for QoS-based Resource Allocation Problems. In Proceedings of the 19th Real-Time Systems Symposium, December 1998.
21. R. Rakvic, B. Black, and J. P. Shen. Completion Time Multiple Branch Prediction for Enhancing Trace Cache Performance. In Proc. of the 27th annual international symposium on Computer architecture (ISCA '00), pages 47-58, 2000.
22. Samsung Electronics Co. K9F2G08UXA 256M x 8 Bit NAND Flash Memory. http://www.samsung.com/global/business/semiconductor/, Aug. 2006.
23. V. Suhendra, T. Mitra, A. Roychoudhury, and T. Chen. WCET centric data allocation to scratchpad memory. In Proc. the 26th IEEE Real-Time Systems Symposium, pages 223-232, 2005.
24. H. Tomiyama and H. Yasuura. Code Placement Techniques for Cache Miss Rate Reduction. ACM Transactions on Design Automation of Electronic Systems, 2(4):410-429, Oct. 1997.
25. I. Toshiba America Electronic Components. Cost Savings with NAND Shadowing Reference Design with Motorola MPC8260 and Toshiba CompactFlash, 2002.
26. X. Vera, B. Lisper, and J. Xue. Data Cache Locking for Higher Program Predictability. In Proc. ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, pages 272-282, 2003.
27. L. Wehmeyer and P. Marwedel. Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software. In Proc. Design, Automation and Test in Europe (DATE2005), pages 600-605, 2005.
28. A. Wolfe. Software-Based Cache Partitioning for Real-time Applications. In Proc. 3rd Int'l Workshop on Responsive Computer Systems, Sept. 1993.
29. D. Woodhouse. JFFS: The Journalling Flash File System. http://sources.redhat.com/jffs2/, July 2003.