A study of side-channel effects in reliability-enhancing techniques

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 2009, Pages 236-244

  Dai, Jianwei ^a   Wang, Lei ^a  

^a UNIVERSITY OF CONNECTICUT   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HARDWARE DESIGN; HARDWARE IMPLEMENTATIONS; INTEGRATED SYSTEMS; MANUFACTURING DEFECTS; MEMORY CIRCUITS; NANO SCALE; NON-IDEALITIES; PROCESS VARIATION; RELIABILITY ENHANCEMENT; SECURITY REQUIREMENTS; SIDE-CHANNEL; SIDE-CHANNEL INFORMATION; SIMULATION RESULT;

DEFECTS; FAULT TOLERANCE; FAULT TOLERANT COMPUTER SYSTEMS; HARDWARE; INFORMATION THEORY; PROBABILITY DENSITY FUNCTION;

QUALITY ASSURANCE;

EID: 77649323870     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFT.2009.32     Document Type: Conference Paper

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