Novel trends in SOI technology for CMOS applications

Solid State Phenomena

Volumn 156-158, Issue , 2009, Pages 69-76

  Kononchuk, Oleg ^a   Landru, Didier ^a   Veytizou, Christelle ^a  

^a PARC TECHNOLOGIQUE DES FONTAINES   (France)

Author keywords

BOX dissolution; Dislocation network; SmartCut; SOI

Indexed keywords

DEFECTS; DISSOLUTION; LEAD OXIDE; SEMICONDUCTING SILICON COMPOUNDS; SILICON NITRIDE; SILICON ON INSULATOR TECHNOLOGY; CMOS INTEGRATED CIRCUITS;

BURIED OXIDES; DISLOCATION NETWORKS; HIGH QUALITY; HIGH TEMPERATURE; HIGH-TEMPERATURE ANNEALING; NEW PROCESS; OPTIMIZED ANNEALING CONDITIONS; OPTIMIZED PROCESS; SMART-CUT; SOI TECHNOLOGY; SOI WAFERS; UNDERLYING MECHANISM; WAFER SURFACE;

SILICON WAFERS;

EID: 75849130288     PISSN: 10120394     EISSN: None     Source Type: Book Series    
DOI: 10.4028/www.scientific.net/SSP.156-158.69     Document Type: Conference Paper

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