The wafer-level packaging evolution

Semiconductor International

Volumn 27, Issue 11, 2004, Pages

  Topper, Michael ^a   Garrou, Philip ^b  

^a FRAUNHOFER IZM   (Germany)

^b IEEE Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BALL GRID ARRAYS (BGA); PHILIPS (CO); SEMICONDUCTOR EQUIPMENT CONSORTIUM FOR ADVANCED PACKAGING (SECAP); WAFER-LEVEL PACKAGES (WLP);

ADHESIVES; APPLICATION SPECIFIC INTEGRATED CIRCUITS; DYNAMIC RANDOM ACCESS STORAGE; FLIP CHIP DEVICES; MICROELECTROMECHANICAL DEVICES; OPTICAL SENSORS; PERSONAL DIGITAL ASSISTANTS; PLASMA ETCHING; SILICON WAFERS; SURFACE MOUNT TECHNOLOGY; THICKNESS MEASUREMENT;

CHIP SCALE PACKAGES;

EID: 7544221311     PISSN: 01633767     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Review

References (10)

1. P. Garrou, "Wafer-Level Packaging Has Arrived," Semiconductor International, October 2000, p. 119.
2. P. Garrou, "Wafer Level Chip Scale Packaging (WL-CSP): An Overview," IEEE Transactions on Advanced Packaging, 2000, Vol. 23, p. 197.
3. P. Garrou and R. Tummala, "Fundamentals of Wafer-Level Packaging," Fundamentals of Microsystems Packaging, Chapter 10, McGraw Hill Book Co., New York, N.Y., 2001.
4. M. Toepper, J. Simon and H. Rtichl, "Redistribution Technology for Chip Scale Packaging Using Photosensitive BCB," Future Fab International, 1996, p. 363.
5. B. Kesser, B. Yeung, J. White and T. Fang, "Encapsulated Double-Bump WL-CSP: Design and Reliability," Proceeding of the 51st Electronic Component Technology Conference, Orlando, Fla., 2001, p. 35.
6. J. Simon and H. Reichl, "Board Level Reliability of a Wafer Level CSP Using Stacked Solder Spheres and a Solder Support Structure," Proceedings of the 50th Electronic Component Technology Conference, Las Vegas, 2000, p. 81.
7. H. Hedler, T. Meyer, W. Leiberg and R. Irsigler, "Bump Wafer Level Packaging," Proceedings of the International Symposium on Microelectronics, Boston, 2003, p. 681.
8. J. Lieb and M. Toepper, "New Wafer Level Packaging Technology Using Silicon-Via-Contacts for Optical and Other Sensor Applications," Proceedings of the 54th Electronic Component Technology Conference, Las Vegas, 2004, p. 843.
9. K. Zooschke, et al., "Thin Film Integration of Passives-Single Components, Filters, Integrated Passive Devices," Proceeding of the 54th Electronic Component Technology Conference, Las Vegas, 2004, p. 294.
10. G. Carchon, X. Sun and W. De Raedt, "High Q, Above IC Inductors and Transmission lines - Comparison to Copper Back End Performance," Proceedings of the 54th Electronic Component Technology Conference, Las Vegas, 2004, p. 1118.