Board level reliability of a waferlevel CSP using stacked solder spheres and a solder support structure (S3)

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2000, Pages 81-86

  Simon, J ^a   Reichl, H ^a  

^a TECHNISCHE UNIVERSITÄT BERLIN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ASSEMBLY; COST EFFECTIVENESS; ELECTRIC BREAKDOWN; ELECTRON DEVICE MANUFACTURE; FAILURE (MECHANICAL); FLIP CHIP DEVICES; PRINTED CIRCUIT BOARDS; RELIABILITY; SILICON WAFERS; SOLDERING;

BOARD LEVEL RELIABILITY; ELECTRICAL FAILURE; SOLDER SUPPORT STRUCTURE; STACKED SOLDER SPHERES;

CHIP SCALE PACKAGES;

EID: 0034479488     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)