A checkpoint/restore framework for systemC-based virtual platforms

2009 International Symposium on System-on-Chip - Proceedings, SoC 2009

Volumn , Issue , 2009, Pages 161-167

  Kraemer, Stefan ^a   Leupers, Rainer ^a   Petras, Dietmar ^b   Philipp, Thomas ^b  

^a RWTH AACHEN UNIVERSITY   (Germany)

^b CoWare Inc ^*  (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CHECK POINTING; DEBUGGERS; REALISTIC SYSTEMS; SIMULATION PROCESS; SOFTWARE DEVELOPER; SOURCE CODE MODIFICATION; SYSTEMC; VIRTUAL PLATFORM;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER SOFTWARE; PROGRAM DEBUGGING; PROGRAMMABLE LOGIC CONTROLLERS; RESTORATION;

EMBEDDED SYSTEMS;

EID: 74549143808     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOCC.2009.5335656     Document Type: Conference Paper

References (20)

1. CoWare Inc., CoWare Virtual Platform, San Jose, CA, http://www.coware.com/products/virtualplatform.php.
2. B. Murray, "Virtual Platforms - A Reality Check," SCD source, no. http://www.scdsource.com/article.php?id=59, Sept 2007.
3. IEEE 1666-2005 Standard, Open SystemC Language Reference Manual, IEEE, Apr 2005.
4. J. Cong, Y. Fan, G. Han, W. Jiang, and Z. Zhang, "Platform-Based Behavior-Level and System-Level Synthesis," in Proceedings of IEEE International SOC Conference, Austin, Texas, USA, sep 2006, pp. 199-202.
5. P. Paolucci, A. Jerraya, R. Leupers, L. Thiele, and P. Vicini, "SHAPES: A Tiled Scalable Software Hardware Architecture Platform for Embedded Systems," in Proceedings of the 4th international Conference on Hardware/Software Codesign and System Synthesis CODES+ISSS '06 (Seoul, Korea). ACM Press., Oct. 2006, pp. 167-172.
6. Cadence NC-Sim, http://www.cadence.com/.
7. Mentor Graphics, ModelSim, http://www.mentor.com/.
8. Synopsys VHDL and Verilog Simulation Software, http://www.synopsys. com.
9. H. Zhong and J. Nieh, "CRAK: Linux Checkpoint/Restart As a Kernel Module" Department of Computer Science, Columbia University, Tech. Rep. CUCS-014-01, Nov. 2001.
10. J. Duell, "The Design and Implementation of Berkeley Lab's Linux Checkpoint/Restart," Paper LBNL-54941, Berkeley, CA, USA, Apr. 2005.
11. E. R. Jason Duell, Paul Hargrove, "Requirements for Linux Checkpoint/Restart," Paper LBNL-49659, Berkeley, CA, USA, May 2002.
12. S. Sankaran, J. M. Squyres, B. Barrett, A. Lumsdaine, J. Duell, P. Hargrove, and E. Roman, "The LAM/MPI Checkpointl/Restart Framework: System-Initiated Checkpointing," International Journal of High Performance Computing Applications, vol. 19, no. 4, pp. 479-493, Winter 2005.
13. M. Litzkow, T. Tannenbaum, J. Basney, and M. Livny, "Checkpoint and Migration of UNIX Processes in the Condor Distributed Processing System," University of Wisconsin Madison Computer Sciences, Tech. Rep. 1346, Apr. 1997.
14. J. S. Plank, M. Beck, G. Kingsley, and K. Li, "Libckpt: Transparent Checkpointing under Unix," in Proceedings of USENIX Winter 1995 Technical Conference, New Orleans, LA, USA, Jan. 1995, pp. 213-224.
15. D. Liang, P.E. Chung, Y. Huang, C. M. R. Kintala, W.-J. Lee, T. K. Tsai, and C.-Y. Wang, "NT-SwiFT: Software Implemented Fault Tolerance on Windows NT," in Journal of Systems and Software, vol. 71. New York, NY, USA: Elsevier Science Inc., Apr. 2004, pp. 127-141.
16. P. E. Chung, W.-J. Lee, Y. Huang, D. Liang, and C.-Y. Wang, "Winckp: A transparent checkpointing and rollback recovery tool for Windows NT applications," in FTCS '99: Proceedings of the Twenty-Ninth Annual International Symposium on Fault-Tolerant Computing. Washington, DC, USA: IEEE Computer Society, 1999, p. 220.
17. H. Abdel-Shafi, E. Speight, and J. K. Bennett, "Efficient User-Level Thread Migration and Checkpointing on Windows NT Clusters," in Proceedings of the 3rd USENIX Windows NT Symposium, Seattle, WA, USA, Jul. 1999.
18. VMWare, VMWare Server, Palo Alto, CA, http://www.vmware.com/ products/server/.
19. E. Roman, "A Survey of Checkpoint/Restart Implementations," Lawrence Berkeley National Laboratory, Berkeley, CA, USA, Berkeley Lab Technical Report LBNL-54942, Jul 2002.
20. P. S. Paolucci, P. Kajfaz, P. Bonnot, B. Candaele, D. Maufroid, E. Pastorelli, A. Ricciardi, Y. Fusella, and E. Guarino, "mAgic-FPU and MADE: A Customizable VLIW Core and the Modular VLIW Processor Architecture Description Environment," Computer Physics Communications, vol. 139, no. 1, pp. 132-143, 2001.