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Volumn , Issue , 2009, Pages 2293-2300

Design considerations of a fast 0-Ω gate-drive circuit for 1.2 kV SiC JFET devices in phase-leg configuration

Author keywords

Gate drive circuit; JFET; Phase leg; Schottky barrier diode (SBD); Silicon carbide (SiC)

Indexed keywords

DESIGN CONSIDERATIONS; DETAILED DESIGN; DRIVE CIRCUITS; EXPERIMENTAL EVALUATION; GATE RESISTANCE; IN-PHASE; INDUCTIVE LOADS; JFET; JUNCTION TEMPERATURES; PHASE-LEG; ULTRA-FAST;

EID: 72449202598     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECCE.2009.5316075     Document Type: Conference Paper
Times cited : (41)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.