Post-fabrication self-convergence scheme for suppressing variability in SRAM cells and logic transistors

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2009, Pages 148-149

  Suzuki, Makoto ^a   Saraya, Takuya ^a   Shimizu, Ken ^a   Sakurai, Takayasu ^a   Hiramoto, Toshiro ^a  

^a INSTITUTE OF INDUSTRIAL SCIENCE   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP FABRICATION; NEW CONCEPT; NOVEL METHODS; POST-FABRICATION; SRAM CELL;

STATIC RANDOM ACCESS STORAGE;

TRANSISTORS;

EID: 71049148457     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

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5. F. Tachibana et al., JJAP, vol. 44, p. 2147, 2005.
6. L. Chang et al., VLSI Tech. Symp., p.128, 2004.
7. A. Bhavnagarwala et al., IEDM, p.675, 2005.