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Volumn , Issue , 2009, Pages 377-382

Dynamic power gating with quality guarantees

Author keywords

Execution units; Low power; Microarchitecture; Power gating; Power management

Indexed keywords

EXECUTION UNITS; LOW POWER; MICRO ARCHITECTURES; POWER GATINGS; POWER MANAGEMENTS;

EID: 70449700253     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1594233.1594331     Document Type: Conference Paper
Times cited : (67)

References (11)
  • 5
    • 37549032725 scopus 로고    scopus 로고
    • H. Q. Le et al. IBM POWER6 Microarchitecture. IBM Journal of Research and Development, 51(6), 2007.
    • H. Q. Le et al. IBM POWER6 Microarchitecture. IBM Journal of Research and Development, 51(6), 2007.
  • 6
    • 34047171260 scopus 로고    scopus 로고
    • S. G. Narendra and A. Chandrakasan, editors, Springer-Verlag
    • S. G. Narendra and A. Chandrakasan, editors. Leakage in Nanometer CMOS Technologies. Springer-Verlag, 2006.
    • (2006) Leakage in Nanometer CMOS Technologies
  • 8
    • 0036858210 scopus 로고    scopus 로고
    • Adaptive Body Bias for Reducing Impacts of Die-to-Die and Within-Die Parameter Variations on Microprocessor Frequency and Leakage
    • Nov
    • J. W. Tschanz et al. Adaptive Body Bias for Reducing Impacts of Die-to-Die and Within-Die Parameter Variations on Microprocessor Frequency and Leakage. IEEE Journal of Solid-State Circuits, 37(11), Nov. 2002.
    • (2002) IEEE Journal of Solid-State Circuits , vol.37 , Issue.11
    • Tschanz, J.W.1
  • 9
    • 0031635212 scopus 로고    scopus 로고
    • Y. Ye, S. Borkar, and V. De. A New Technique for Standby Leakage Reduction in High-Performance Circuits. In Proc. of the Symposium on VLSI Circuits, 1998.
    • Y. Ye, S. Borkar, and V. De. A New Technique for Standby Leakage Reduction in High-Performance Circuits. In Proc. of the Symposium on VLSI Circuits, 1998.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.