Benefits and costs of power-gating technique

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn 2005, Issue , 2005, Pages 559-566

  Jiang, Hailin ^a   Marek Sadowska, Malgorzata ^a   Nassif, Sani R ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GATED AREA; LEAKAGE POWER; POWER GATING TECHNIQUE; SUPPLY VOLTAGE;

COST BENEFIT ANALYSIS; ELECTRIC POTENTIAL; ELECTRIC POWER SYSTEMS; PARAMETER ESTIMATION; TECHNOLOGY TRANSFER; TRANSISTORS;

LEAKAGE CURRENTS;

EID: 33748557768     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2005.34     Document Type: Conference Paper

References (10)

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