A case for dynamic pipeline scaling

Proceedings of the 2002 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES '02

Volumn , Issue , 2002, Pages 1-8

  Koppanalil, Jinson ^a   Ramrakhyani, Prakash ^a   Desai, Sameer ^a   Vaidyanathan, Anu ^a   Rotenberg, Eric ^a  

^a North Carolina State University   (United States)

Author keywords

Clock gating; Configurable pipeline; Dynamic voltage scaling; Fetch gating; Power and energy management; Shallow and deep pipelines; Variable depth pipeline

Indexed keywords

CLOCK GATING; CONFIGURABLE PIPELINE; DEEP PIPELINES; DYNAMIC VOLTAGE SCALING; POWER AND ENERGY MANAGEMENT;

EMBEDDED SYSTEMS; ENERGY MANAGEMENT; MICROPROCESSOR CHIPS; PROGRAM COMPILERS; SYNTHESIS (CHEMICAL); VOLTAGE STABILIZING CIRCUITS;

PIPELINES;

EID: 70449665953     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/581630.581632     Document Type: Conference Paper

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