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Volumn 9, Issue 10, 2009, Pages 8336-8348

A CMOS-compatible, low-noise ISFET based on high efficiency ion-modulated lateral-bipolar conduction

Author keywords

CMOS compatible; ISFET; Lateral bipolar conduction; Low noise

Indexed keywords

BIASING CONDITIONS; CMOS COMPATIBLE; LAYOUT DESIGNS; LOW NOISE; LOW-FREQUENCY NOISE; LOW-NOISE APPLICATIONS; NOISE PERFORMANCE; STANDARD CMOS TECHNOLOGY;

EID: 70449576048     PISSN: 14248220     EISSN: None     Source Type: Journal    
DOI: 10.3390/s91008336     Document Type: Article
Times cited : (17)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.