A simultaneous tri-band on-chip rf-interconnect for future network-on-chip

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2009, Pages 90-91

  Tam, Sai Wang ^a   Socher, Eran ^a   Wong, Alden ^a   Chang, Mau Chung Frank ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLITUDE SHIFT KEYING; CAPACITIVE COUPLINGS; DIFFERENTIAL TRANSMISSION LINES; ENERGY-PER-BIT; FUTURE NETWORKS; LOW SWING; MM-WAVE FREQUENCIES; ON CHIPS;

ELECTRIC NETWORK TOPOLOGY; MILLIMETER WAVES;

VLSI CIRCUITS;

EID: 70449563111     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. R. Ho, et.al, "The future of wires", Proceedings of the IEEE, 89(4), April 2001
2. J.D Owens et.al, "Research Challenges for On-Chip Interconnection Networks" , IEEE MICRO, Sept 2007
3. Ron Ho, et.al. "High Speed and Low Energy Capacitively Driven On-Chip Wires", IEEE Journal of Solid-State Circuits, Jan 2008
4. H. Ito, et.al, "A 8-Gbps Low Latency Multi-Drop On-Chip Transmission Line Interconnect with 1.2mW Two-Way Transceivers", VLSI Sym., 2007
5. A. Jose, et.al, "Distributed Loss-Compensation Techniques for Energy-Efficient Low Latency On-Chip Communication", IEEE Journal of Solid-State Circuits, June 2007
6. M. Frank Chang et.al, "CMP Network-on-Chip Overlaid With Multi-Band RF-Interconnect", IEEE HPCA Sym, Feb. 2008