Novel techniques for scaling deep trench DRAM capacitor technology to 0.11 μm and beyond

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Volumn 2003-January, Issue , 2003, Pages 21-24

  Parkinson, P S ^a   Settlemyer, K ^a   McStay, I ^b   Park, D G ^a   Ramachandran, R ^b   Chudzik, M ^a   Cheng, K ^c   Sung, C Y ^c   Chen, F ^b   Strong, A ^b   Papworth, P ^b   Jammy, R ^c  

^a IBM RESEARCH   (United States)

^b IBM MICROELECTRONICS   (United States)

^c NONE

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; DIELECTRIC MATERIALS; SILICON NITRIDE; SILICON WAFERS;

CAPACITANCE ENHANCEMENT; CRITICAL DIMENSION; DEEP TRENCH CAPACITORS; DRAM CAPACITOR; FUTURE GENERATIONS; HEMISPHERICAL GRAINED SILICONS; NOVEL TECHNIQUES; OPERATIONAL LIFETIME;

CAPACITANCE;

EID: 70449127726     PISSN: 19308868     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTSA.2003.1252541     Document Type: Conference Paper

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