Optimizing throughput of power- and thermal-constrained multicore processors using DVFS and per-core power-gating

Proceedings - Design Automation Conference

Volumn , Issue , 2009, Pages 47-50

  Jungseob, Lee ^a   Nam, Sung Kim ^a  

^a Wisconsin Electric Machines and Power Electronics Consortium   (United States)

Author keywords

DVFS; Multicore processor; Power gating

Indexed keywords

CORE PROCESSORS; DVFS; DYNAMIC VOLTAGE AND FREQUENCY SCALING; FREQUENCY VARIATION; LEAKAGE POWER; LIMITED PARALLELISM; MAXIMUM OPERATING FREQUENCY; MULTICORE PROCESSOR; NEGATIVE IMPACTS; NONUNIFORM; OPERATING FREQUENCY; PARALLEL APPLICATION; POWER GATING; POWER GATINGS; PROCESS VARIABILITY; PROCESS VARIATION; RUNNING APPLICATIONS; SUPPLY-VOLTAGE SCALING; THROUGHPUT ANALYSIS; TOTAL POWER CONSUMPTION; WITHIN-DIE PROCESS;

COMPUTER AIDED DESIGN; DIES; DIGITAL INTEGRATED CIRCUITS; LEAKAGE CURRENTS; MICROPROCESSOR CHIPS; OPTIMIZATION;

THROUGHPUT;

EID: 70350742069     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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