Polarization mode basis functions for modeling insulator-coated Through-Silicon Via (TSV) interconnections

2009 IEEE Workshop on Signal Propagation on Interconnects, SPI '09

Volumn , Issue , 2009, Pages

  Ki, Jin Han ^a   Swaminathan, Madhavan ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

3-D INTEGRATION; BASIS FUNCTIONS; ELECTRICAL CHARACTERISTIC; EM SIMULATIONS; EQUIVALENT NETWORK; HIGH-DENSITY; INSULATOR COATINGS; MODAL BASIS; POLARIZATION CURRENT; POLARIZATION MODES;

DISTRIBUTION FUNCTIONS; INTERCHANGES; POLARIZATION;

THREE DIMENSIONAL;

EID: 70349977622     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SPI.2009.5089849     Document Type: Conference Paper

References (10)

1. Knickerbocker, J. U. et al, "3D silicon integration," Proc. Electronic Components and Technology Conference (ECTC '08), pp. 538-543, May 2008.
2. Han, K. J., Swaminathan, M., "Parasitic Extraction of Interconnections in 3-D Packaging Using Mixed Potential Integral Equation with Global Basis Functions," Proc. Asia-Pacific Microwave Conference (APMC '08), pp. F2-08, Dec. 2008.
3. Cheng, D. K., Field and Wave Electromagnetics, Addison-Wesley (1989), pp. 183-188.
4. Clements, J. C., Paul, C. R., Adams, A. T., "Computation of the Capacitance Matrix for Systems of Dielectric-Coated Cylindrical Conductors," IEEE Trans-EMC, Vol. 17, No. 4 (1975), pp. 238-248.
5. Han, K. J., Swaminathan, M., "Inductance and Resistance Calculations in Three-Dimensional Packaging Using Cylindrical Conduction Mode Basis Functions," IEEE Trans-CAD, to be published.
6. Ruehli, A. E., Heeb, H., "Circuit Models for Three-Dimensional Geometrices Including Dielectrics," IEEE Trans-MTT, Vol. 40, No. 7 (1992), pp. 1507-1516.
7. Paul, C. R., Analysis of Multiconductor Transmission Lines, Wiley (Hoboken, 2008), pp. 119-130.
8. Das, B. N., Das, S., Parida, D., "Capacitance of Transmission Line of Parallel Cylinders with Variable Radial Width," IEEE Trans-EMC, Vol. 40, No. 4 (1998), pp. 325-330.
9. Yang, R.-Y., Hung, C.-Y., Su, Y.-K., Weng, M.-H., Wu, H.-W., "Loss Characteristics of Silicon Substrate with Different Resistivities," Microwave and Optical Technology Letters, Vol. 48, No. 9 (2006), pp. 1773-1776.
10. Ryu, C. et al, "High Frequency Electrical Model of Through Wafer Via for 3-D Stacked Chip Packaging," Proc. Electronics Systemintegration Technology Conference, pp. 215-220, 2006.