Proposal of a desk-side supercomputer with reconfigurable data-paths using rapid single-flux-quantum circuits

IEICE Transactions on Electronics

Volumn E91-C, Issue 3, 2008, Pages 350-355

  Takagi, Naofumi ^a   Murakami, Kazuaki ^b   Fujimaki, Akira ^a   Yoshikawaj, Nobuyuki ^c   Inoue, Koji ^b   Honda, Hiroaki ^b  

^a NAGOYA UNIVERSITY   (Japan)

^b KYUSHU UNIVERSITY   (Japan)

^c YOKOHAMA NATIONAL UNIVERSITY   (Japan)

Author keywords

High peiformance computing; Reconfigurable data path; Supercomputer; Superconductos rapid single flux quantum circuit

Indexed keywords

CROSSBAR EQUIPMENT; DELTA SIGMA MODULATION; DIGITAL ARITHMETIC; SEMICONDUCTOR DEVICE MANUFACTURE; SUPERCOMPUTERS; TIMING CIRCUITS;

DATA PATHS; FLOATING POINT OPERATIONS; FLOATING POINT UNITS; GENERAL-PURPOSE MICROPROCESSORS; HIGH-PEIFORMANCE COMPUTING; PROCESS TECHNOLOGIES; RAPID SINGLE FLUX QUANTUM CIRCUITS; SEMICONDUCTOR TECHNOLOGY;

RECONFIGURABLE HARDWARE;

EID: 68149097680     PISSN: 09168524     EISSN: 17451353     Source Type: Journal    
DOI: 10.1093/ietele/e91-c.3.350     Document Type: Article

References (17)

1. K.K. Likharev and V.K. Semenov, "RSFQ logic/memory family: A new Josephson-Junction technology for sub-terahertz-clockfrequency digital systems, "IEEE Trans. Appl. Supercond., vol.1, no.1, pp. 3-28, March 1991.
2. N. Yoshikawa, "Recent development and perspective of ultra-highspeed microprocessors using single-flux-quantum circuits, "IEICE Trans. Electron. (Japanese Edition), vol.J91-C, no.3, pp. 183-193, March 2008.
3. M. Tanaka, T. Kondo, N. Nakajima, T. Kawamoto, Y. Yamanashi, Y. Kamiya, A. Akimoto, A. Fujimaki, H. Hayakawa, N. Yoshikawa, H. Terai, Y. Hashimoto, and S. Yorozu, "Demonstration of a singleflux- quantum microprocessor using passive transmission lines, "IEEE Trans. Appl. Supercond., vol.15, pp. 400-404, June 2005.
4. Y. Yamanashi, M. Tanaka, A. Akimoto, H. Park, Y. Kamiya, N. Irie, N. Yoshikawa, A. Fujimaki, H. Terai, and Y. Hashimoto, "Design and implementation of a pipelined bit-serial SFQ microprocessor, CORE1b, "to be published in IEEE Trans. Appl. Supercond.
5. A. Fujimaki, M. Tanaka, T. Yamada, Y. Yamanashi, H. Park, and N. Yoshikawa, "Bit-serial single flux quantum microprocessor CORE, "IEICE Trans. Electron., vol.E91-C, no.3, pp. 342-349, March 2008.
6. T. Satoh, K. Hinode, H. Akaike, S. Nagasawa, Y. Kitagawa, and M. Hidaka, "Characteristics of Nb/AlOx/Nb junctions fabricated in planarized multi-layer Nb SFQ circuits, "Physica C 445-448, pp. 937-940, 2006.
7. S.V. Polonsky, V.K. Semenov, and D.F. Schneider, "Transmission of single-flux-quantum pulses along superconducting microstrip lines, "IEEE Trans. Appl. Supercond., vol.3, pp. 2598-2600, 1993.
8. T. Yamada, H. Ryoki, A. Fujimaki, and S. Yorozu, "Flexible superconducting passive interconnects with 50-Gb/s signal transmissions in single-flux-quantum circuits, "Jpn. J. Appl. Phys. Pt. 1, 45 (2A), pp. 752-757, 2006.
9. W.A. Wulf and S.A. McKee, "Hitting the memory wall: Implications of the obvious, "ACM SIGARCH Computer Architecture News, vol.23, no.1, pp. 20-24, March 1995.
10. D. Burger, J.R. Goodman, and A. Kagi, "Memory bandwidth limitations of future micro-processors, "Proc. 23rd Annual International Symposium on Computer Architecture, pp. 78-89, May 1996.
11. K. Shimasaki, T. Nagano, H. Honda, F. Mehdipour, K. Inoue, and K. Murakami, "On-chip network architecture for large scale reconfigurable datapath (in Japanese), "IPSJ SIG Technical Reports, 2007- ARC-173, pp. 115-120, June 2007.
12. K. Nakamura, H. Hatae, M. Harada, Y. Kuwayama, M. Uehara, H. Sato, S. Obara, H. Honda, U. Nagashima, Y. Inadomi, and K. Murakami, "Eric: A special-purpose processor for ERI calculations in quantum chemistry applications, "Proc. HPC-Asia 2002, Dec. 2002.
13. K. Nakamura, H. Honda, K. Inoue, H. Sato, M. Uehara, H. Komatsu, H. Umeda, Y. Inadomi, K. Araki, T. Sasaki, S. Obara, U. Nagashima, and K. Murakami, "A HighPerformance, LowPower chip multiprocessor for large scale molecular orbital calculation, "Proc. Workshop Unique Chips and Systems, pp. 87-94, March 2005.
14. Y. Hashimoto, S. Yorozu, T. Satoh, and T. Miyazaki, "Demonstration of chip-to-chip transmission of single-flux-quantum pulse at throughputs beyond 100Gbps, "Appl. Phys. Lett., vol.87, 022502, 2005.
15. M. Maezawa and A. Shoji, "Overdamped Josephson junctions with Nb/AIO, /Al/AIO, /Nb structure for integrated circuit application, "Appl. Phys. Lett., vol.70, pp. 3603-3605, June 1997.
16. N. Yoshikawa and Y. Kato, "Reduction of power consumption of RSFQ circuits by inductance-load-biasing, "Supercond. Sci. Technol., vol.12, pp. 782-785, 1999.
17. http://www.jst.go.jp/kisoken/crest/intro/crest-eng-2006-2007May. pdf, p. 17.