Stochastic synapse with short-term depression for silicon neurons

Conference Proceedings - IEEE Biomedical Circuits and Systems Conference Healthcare Technology, BiOCAS2007

Volumn , Issue , 2007, Pages 99-102

  Xu, Peng ^a   Horiuchi, Timothy K ^a   Sarje, Anshu ^a   Abshire, Pamela ^a  

^a UNIVERSITY OF MARYLAND   (United States)

Author keywords

Short term depression (STD); Spike; Stochastic synapse; Synaptic plasticity; Synaptic transmission

Indexed keywords

SHORT-TERM DEPRESSION (STD); SPIKE; STOCHASTIC SYNAPSE; SYNAPTIC PLASTICITY; SYNAPTIC TRANSMISSION;

DISEASES; GAIN CONTROL; PLASTICITY; POWER SPECTRAL DENSITY; STOCHASTIC SYSTEMS; VLSI CIRCUITS;

STOCHASTIC MODELS;

EID: 67651145920     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/BIOCAS.2007.4463318     Document Type: Conference Paper

References (14)

1. L. F. Abbott, J. A. Varela, K. Sen, and S. B. Nelson, "Synaptic depression and cortical gain control," Science, vol. 275, pp. 220-224, 1997.
2. E. S. Fortune and G. J. Rose, "Short-term synaptic plasticity as a temporal filter," Trends Neurosci., vol. 24, pp. 381-385, July 2001.
3. W. Maass and A. M. Zador, "Dynamic stochastic synapses as computational units," Neural Comput., vol. 11, no. 4, pp. 903-917, 1999.
4. H. S. Seung, "Learning in spiking neural networks by reinforcement of stochastic synaptic transmission," Neuron, vol. 40, pp. 1063-1073, Dec. 2003.
5. M. S. Goldman, P. Maldonado, and L. F. Abbott, "Redundancy reduction and sustained firing with stochastic depressing synapses," J. Neurosci., vol. 22, no. 2, pp. 584-591, 2002.
6. W. Senn, H. Markram, and M. Tsodyks, "An algorithm for modifying neurotransmitter release probability based on pre- and postsynaptic spike timing," Neural Computation, vol. 13, pp. 35-67, 2000.
7. P. Häfliger and M. Mahowald, "Spike based normalizing Hebbian learning in an analog VLSI artificial neuron," Int. J. Analog Integr. Circuits Signal Process., vol. 18, no. 2-3, pp. 133-139, 1999.
8. S.-C. Liu, "Analog VLSI circuits for short-term dynamic synapses," EURASIP Journal on Applied Signal Processing, vol. 2003, pp. 620-628, 2003.
9. G. Indiveri, E. Chicca, and R. Douglas, "A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity," IEEE Trans. Neural Networks, vol. 17, pp. 211-221, 2006.
10. D. H. Goldberg, G. Cauwenberghs, and A. G. Andreou, "Probabilistic synaptic weighting in a reconfigurable network of VLSI integrate-and-fire neurons," Neural Networks, vol. 14, pp. 781-793, 2001.
11. E. Chicca, D. Badoni, V. Dante, M. D'Andreagiovanni, G. Salina, L. Carota, S. Fusi, and P. Del Giudice, "A VLSI recurrent network of integrate-and-fire neurons connected by plastic synapses with long-term memory," IEEE Trans. Neural Networks, vol. 14, pp. 1297-1307, 2003.
12. C. S. Petrie and J. A. Connelly, "A noise-based IC random number generator for applications in cryptography," IEEE Trans. Circuits Syst. I, vol. 47, no. 5, pp. 615-621, May 2000.
13. P. Xu, Y. Wong, T. Horiuchi, and P. Abshire, "Compact floating-gate true random number generaor," Electronics Letters, vol. 42, no. 23, pp. 1346-1347, Nov. 2006.
14. Y. L. Wong, M. H. Cohen, and P. A. Abshire, "A floating-gate comparator with automatic offset adaptation for 10-bit data conversion," IEEE Trans. Circuits Syst. I, vol. 52, no. 7, pp. 1316-1326, July 2005.