Analytical expressions for high-frequency VLSI interconnect impedance extraction in the presence of a multilayer conductive substrate

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 28, Issue 7, 2009, Pages 1047-1060

  Srivastava, Navin ^a   Suaya, Roberto ^a   Banerjee, Kaustav ^b  

^a MENTOR GRAPHICS CORPORATION   (United States)

^b University of California   (United States)

Author keywords

Green's function; High frequency; Impedance; Magnetic dipole; Parasitic extraction; Substrate; VLSI interconnect

Indexed keywords

HIGH FREQUENCY; IMPEDANCE; MAGNETIC DIPOLE; PARASITIC EXTRACTION; VLSI INTERCONNECT;

DIFFERENTIAL EQUATIONS; FUNCTION EVALUATION; GREEN'S FUNCTION; INTERCONNECTION NETWORKS; MULTILAYERS;

SUBSTRATES;

EID: 67650895067     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2009.2017432     Document Type: Article

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