Towards automated ECOs in FPGAs

Proceedings of the 7th ACM SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA'09

Volumn , Issue , 2009, Pages 3-12

  Ling, Andrew ^a   Brown, Stephen ^b   Zhu, Jianwen ^a   Safarpour, Sean ^a  

^a UNIVERSITY OF TORONTO   (Canada)

^b Toronto Technology Center Altera Corporation   (Canada)

Author keywords

Boolean Satisfiability; FPGA; Optimization; PST; Resynthesis

Indexed keywords

AUTOMATED METHODS; BOOLEAN SATISFIABILITY; CIRCUIT PERFORMANCE; ENGINEERING CHANGE ORDERS; FPGA; FPGA DESIGN; FUNCTIONAL CHANGES; MANUAL FASHION; NETLIST; PLACEMENT AND ROUTING; PST; RESYNTHESIS;

BOOLEAN FUNCTIONS; DESIGN; FIELD EFFECT TRANSISTORS; LOGIC GATES;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 67650668435     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1508128.1508131     Document Type: Conference Paper

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