On runtime management in multi-core packet processing systems

Proceedings of the 4th ACM/IEEE Symposium on Architectures for Networking and Communications Systems, ANCS '08

Volumn , Issue , 2008, Pages 69-78

  Wu, Qiang ^a   Wolf, Tilman ^a  

^a University of Massachusetts   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHANGING WORKLOAD; CLICK MODULAR ROUTER; DATA PATHS; DATA RATES; DYNAMIC CHANGES; MAXIMIZE THROUGHPUT; MULTI CORE; MULTIPLE PROCESSORS; PACKET PROCESSING; PROCESSING RESOURCES; PROCESSOR CORES; PROTOTYPE IMPLEMENTATIONS; PROTOTYPE SYSTEM; RUN-TIME PROFILING; RUNTIME MANAGEMENT; TRAFFIC CHARACTERISTICS;

MANAGEMENT; MICROPROCESSOR CHIPS; PACKET NETWORKS; ROUTERS; SHAPE MEMORY EFFECT; SOFTWARE PROTOTYPING;

DATA PROCESSING;

EID: 67650350429     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1477942.1477953     Document Type: Conference Paper

References (23)

1. ANDERSON, T., PETERSON, L., SHENKER, S., AND TURNER, J. Overcoming the Internet impasse through virtualization. Computer 38, 4 (Apr. 2005), 34-41.
2. CALVERT, K. L., GRIFFIOEN, J., AND WEN, S. Lightweight network support for scalable end-to-end services. In SIGCOMM '02: Proceedings of the 2002 conference on Applications, technologies, architectures, and protocols for computer communications (Pittsburgh, PA, Aug. 2002), pp. 265-278.
3. CHEN, B., AND MORRIS, R. Flexible control of parallelism in a multiprocessor PC router. In Proc. of the General Track: 2002 USENIX Annual Technical Conference (Monterey, CA, June 2001), pp. 333-346.
4. CISCO SYSTEMS, INC. The Cisco QuantumFlow Processor: CiscoŠs Next Generation Network Processor. San Jose, CA, Feb. 2008.
5. DECASPER, D., DITTIA, Z., PARULKAR, G., AND PLATTNER, B. Router Plugins - a modular and extensible software framework for modern high performance integrated services routers. In Proc. of ACM SIGCOMM 98 (Vancouver, BC, Sept. 1998), pp. 229-240.
6. EATHERTON, W. The push of network processing to the top of the pyramid. In Keynote Presentation at ACM/IEEE Symposium on Architectures for Networking and Communication Systems (ANCS) (Princeton, NJ, Oct. 2005).
7. FELDMANN, A. Internet clean-slate design: what and why? SIGCOMM Computer Communication Review 37, 3 (July 2007), 59-64.
8. GANAPATHY, S., AND WOLF, T. Design of a network service architecture. In Proc. of Sixteenth IEEE International Conference on Computer Communications and Networks (ICCCN) (Honolulu, HI, Aug. 2007), pp. 754-759.
9. GOGLIN, S. D., HOOPER, D., KUMAR, A., AND YAVATKAR, R. Advanced software framework, tools, and languages for the IXP family. Intel Technology Journal 7, 4 (Nov. 2003), 64-76.
10. GROHOSKI, G. Niagara2: A highly threaded server-on-a-chip. In Proc. of Symposium on High Performance Chips (HOT CHIPS 18 (Palo Alto, CA, Aug. 2006).
11. HADZIC, I., MARCUS, W. S., AND SMITH, J. M. On-the-fly programmable hardware for networks. In Proc. of IEEE Globecom 98 (Syndey, Australia, Nov. 1998).
12. HUTCHINSON, N. C., AND PETERSON, L. L. The x-kernel: An architecture for implementing network protocols. IEEE Transactions on Software Engineering 17, 1 (Jan. 1991), 64-76.
13. KOHLER, E., MORRIS, R., CHEN, B., JANNOTTI, J., AND KAASHOEK, M. F. The Click modular router. ACM Transactions on Computer Systems 18, 3 (Aug. 2000), 263-297.
14. KOKKU, R., RICHÉ, T., KUNZE, A., MUDIGONDA, J., JASON, J., AND VIN, H. A case for run-time adaptation in packet processing systems. In Proc. of the 2nd Workshop on Hot Topics in Networks (HOTNETS-II) (Cambridge, MA, Nov. 2003).
15. LOCKWOOD, J. W., MCKEOWN, N., WATSON, G., GIBB, G., HARTKE, P., NAOUS, J., RAGHURAMAN, R., AND LUO, J. NetFPGA-an open platform for gigabit-rate network switching and routing. In MSE '07: Proceedings of the 2007 IEEE International Conference on Microelectronic Systems Education (San Diego, CA, June 2007), pp. 160-161.
16. MALLIK, A., AND MEMIK, G. Automated task distribution in multicore network processors using statistical analysis. In Proc. of ACM/IEEE Symposium on Architectures for Networking and Communication Systems (ANCS) (Orlando, FL, Dec. 2007), pp. 67-76.
17. PLISHKER, W., RAVINDRAN, K., SHAH, N., AND KEUTZER, K. Automated task allocation for network processors. In Proc. of Network System Design Conference (Oct. 2004), pp. 235-245.
18. SHAH, N., PLISHKER, W., RAVINDRAN, K., AND KEUTZER, K. Np-click: A productive software development approach for network processors. IEEE Micro 24, 5 (Sept. 2004), 45-54.
19. SPALINK, T., KARLIN, S., PETERSON, L., AND GOTTLIEB, Y. Building a robust software-based router using network processors. In Proc. of the 18th ACM Symposium on Operating Systems Principles (SOSP) (Banff, AB, Oct. 2001), pp. 216-229.
20. TENNENHOUSE, D. L., AND WETHERALL, D. J. Towards an active network architecture. ACM SIGCOMM Computer Communication Review 26, 2 (Apr. 1996), 5-18.
21. TURNER, J. S. A proposed architecture for the GENI backbone platform. In Proc. of ACM/IEEE Symposium on Architectures for Networking and Communication Systems (ANCS) (San Jose, CA, Dec. 2006), pp. 1-10.
22. TURNER, J. S., CROWLEY, P., DEHART, J., FREESTONE, A., HELLER, B., KUHNS, F., KUMAR, S., LOCKWOOD, J., LU, J., WILSON, M., WISEMAN, C., AND ZAR, D. Supercharging PlanetLab: a high performance, multi-application, overlay network platform. In SIGCOMM '07: Proceedings of the 2007 conference on Applications, technologies, architectures, and protocols for computer communications (Kyoto, Japan, Aug. 2007), pp. 85-96.
23. WOLF, T., WENG, N., AND TAI, C.-H. Run-time support for multi-core packet processing systems. IEEE Network 21, 4 (July 2007), 29-37.