On the functional failure and switching time analysis of the MOBILE circuit

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 2531-2534

  Li, Sing Rong ^a   Mazumder, Pinaki ^a   Yang, Kyounghoon ^b  

^a The Department of Civil and Environmental Engineering   (United States)

^b Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ANALYTICAL RESULTS; CIRCUIT CONFIGURATIONS; CIRCUIT OPERATION; CRITICAL VALUE; DEVICE SIZES; DRIVING CAPABILITY; ELECTRICAL CHARACTERISTIC; FABRICATION TECHNOLOGIES; FAN-OUT; FUNCTIONAL FAILURE; LARGE NETWORKS; LOGIC FUNCTIONS; NOISE MARGINS; NON-LINEARITY; OPERATING FREQUENCY; OPERATIONAL ABILITY; PIECEWISE LINEAR MODELS; POOR PERFORMANCE; QUANTUM PHYSICS; RISING TIME; RTD MODEL; SPICE SIMULATORS; SWITCHING TIME; UNIVERSITY OF MICHIGAN;

CIRCUIT SIMULATION; DIGITAL INTEGRATED CIRCUITS; ELECTRON TUBE DIODES; FAILURE ANALYSIS; PIECEWISE LINEAR TECHNIQUES; QUALITY ASSURANCE; RESONANT TUNNELING; SEMICONDUCTOR DIODES; SIMULATORS; TEMPERATURE MEASURING INSTRUMENTS; WIRELESS NETWORKS;

SPICE;

EID: 67649130554     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465141     Document Type: Conference Paper

References (7)

1. P. Mazumder, S. Kulkarni, M. Bhattacharya, J.P. Sun, and G.I. Haddad, "Digital Circuit Applications of Resonant Tunneling Devices," Proc. of the IEEE, vol. 86, pp. 664-686, April 1998.
2. K. Maezawa and T. Mizutani, "A new resonant tunneling logic gate employing monostable bistable transition," Jpn. J. Appl. Phys., vol. 32, pp. 42-44, 1993.
3. T.C.L.G. Sollner, E. R. Brown, C-L. Chen, C. G. Fonstad, W.D. Goodhue, R.H. Mathews and J.P. Sage, "Resonant-tunneling-diode circuits," Proc. Int. Semicond. Devices Res. Symp., Charlottesville, pp. 307-310, 1993.
4. K. Maezawa, "Analysis of Switching Time of Monostable-Bistable Transition Logic Elements Based on Simple Model Calculation," Jpn. J. Appl. Phys., vol. 34, pp. 1213-1217, 1995.
5. Y. Ohno, S. Kishimoto, T. Mizutani and K. Maezawa, "Operation Speed Consideration of Resonant Tunneling Logic Gate Based on Circuit Simulation," IEICE Trans. Elec., vol. E79-C, no. 11, pp. 1530-1536, 1996.
6. T. Uemura and P. Mazumder, "Rise Time Analysis of MOBILE Circuit," Proc. IEEE Int. Symp. on Circuits and System, pp. 864-867, 2002.
7. H. Matsuzaki, H. Fukuyama, and T. Enoki, "Analysis of Transient Response and Operating Speed of MOBILE," IEEE Tran. Electron Devices, vol. 51, no. 4, pp.616-622, 2004.