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Volumn , Issue , 2007, Pages 691-694

A Process and Temperature Compensated Two-Stage Ring Oscillator

Author keywords

[No Author keywords available]

Indexed keywords

FEEDBACK; INTEGRATED CIRCUITS; OSCILLATORS (ELECTRONIC);

EID: 67349163355     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2007.4405826     Document Type: Conference Paper
Times cited : (25)

References (6)
  • 1
    • 0035273843 scopus 로고    scopus 로고
    • A CMOS clock recovery circuit for 2. 5 Gb/s NRZ data
    • Mar
    • S. Anand, B. Razavi, "A CMOS clock recovery circuit for 2. 5 Gb/s NRZ data, " IEEE J. Solid-State Circuits, vol. 36 , pp. 432-439, Mar. 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , pp. 432-439
    • Anand, S.1    Razavi, B.2
  • 3
    • 9144269955 scopus 로고    scopus 로고
    • A 40-43-Gb/s clock and data recovery ic with integrated sfi-5 1:16 demultiplexer in sige technology
    • Dec
    • A. Ong, et al. , "A 40-43-Gb/s Clock and Data Recovery IC with Integrated SFI-5 1:16 Demultiplexer in SiGe Technology, " IEEE J. Solid-State Circuits, vol. 38, pp. 2155-2168, Dec. 2003.
    • (2003) IEEE J. Solid-State Circuits , vol.38 , pp. 2155-2168
    • Ong, A.1
  • 4
    • 0035247681 scopus 로고    scopus 로고
    • A 2-V 900-MHz monolithic CMOS dual loop frequency synthesizer for GSM receivers
    • Feb
    • W. Yan, H. Luong, "A 2-V 900-MHz Monolithic CMOS Dual Loop Frequency Synthesizer for GSM Receivers, " IEEE J. Solid-State Circuits, vol. 36, pp. 204-216, Feb. 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , pp. 204-216
    • Yan, W.1    Luong, H.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.