A 2-V 900-MHz monolithic CMOS dual-loop frequency synthesizer for GSM receivers

IEEE Journal of Solid-State Circuits

Volumn 36, Issue 2, 2001, Pages 204-216

  Yan, W S T ^a   Luong, H C ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

Frequency synthesis; Frequency synthesizer; Phase locked loop; Radio frequency; Voltage controlled oscillator

Indexed keywords

CHIP SCALE PACKAGES; CMOS INTEGRATED CIRCUITS; ELECTRIC POWER SYSTEMS; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; NOISE ABATEMENT; PHASE LOCKED LOOPS; RADIO RECEIVERS; SPURIOUS SIGNAL NOISE; VARIABLE FREQUENCY OSCILLATORS;

DUAL-LOOP FREQUENCY SYNTHESIZERS;

FREQUENCY SYNTHESIZERS;

EID: 0035247681     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.902761     Document Type: Article

References (17)

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