Merging state and preserving timing anomalies in pipelines of high-end processors

Proceedings - Real-Time Systems Symposium

Volumn , Issue , 2008, Pages 467-477

  Mohan, Sibin ^a   Mueller, Frank ^a  

^a North Carolina State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALYSIS TECHNIQUES; INSTRUCTION SCHEDULING; MODERN PROCESSORS; NON-DETERMINISM; OUT OF ORDER; PROCESSOR PIPELINES; TEMPORAL CONSTRAINTS; WORST-CASE EXECUTION;

COMPUTER ARCHITECTURE; EMBEDDED SYSTEMS; PIPELINES; REAL TIME SYSTEMS; TIME MEASUREMENT;

PIPELINE PROCESSING SYSTEMS;

EID: 67249140228     PISSN: 10528725     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTSS.2008.12     Document Type: Conference Paper

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