메뉴 건너뛰기




Volumn , Issue , 2008, Pages

An ASIC-design-based configurable SOC architecture for networked media

Author keywords

[No Author keywords available]

Indexed keywords

COARSE-GRAINED; CONFIGURABLE; FUNCTION UNIT; MULTIMEDIA APPLICATIONS; NETWORKED MEDIA; PARALLEL COMPUTING; SOC ARCHITECTURE;

EID: 67249088894     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSOC.2008.4694877     Document Type: Conference Paper
Times cited : (1)

References (10)
  • 1
    • 33846227016 scopus 로고    scopus 로고
    • Leon, A. S.; Tam, K. W.; Shin, J. L.; Weisner, D.; Schumacher, F.; A Power-Efficient High-Throughput 32-Thread SPARC Processor, Solid-State Circuits, IEEE Journal of 42, Issue 1, Jan. 2007 Page(s):7-16
    • Leon, A. S.; Tam, K. W.; Shin, J. L.; Weisner, D.; Schumacher, F.; "A Power-Efficient High-Throughput 32-Thread SPARC Processor", Solid-State Circuits, IEEE Journal of Volume 42, Issue 1, Jan. 2007 Page(s):7-16
  • 2
    • 27344435504 scopus 로고    scopus 로고
    • The design and implementation of a first-generation CELL processor
    • Digest of Technical Papers. ISSCC, IEEE International 6-10 Feb, Pages, 2005
    • Pham, D.; Asano, S.; Bolliger, M.; Day, M.N.; "The design and implementation of a first-generation CELL processor", Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International 6-10 Feb. 2005 Page(s):184-592 Vol. 1
    • (2005) Solid-State Circuits Conference , vol.1 , pp. 184-592
    • Pham, D.1    Asano, S.2    Bolliger, M.3    Day, M.N.4
  • 3
    • 36248967018 scopus 로고    scopus 로고
    • Software-Defined Radio Prospects for Multistandard Mobile Phones
    • Oct, Pages
    • Ramacher, U.; "Software-Defined Radio Prospects for Multistandard Mobile Phones", Computer Volume 40, Issue 10, Oct. 2007 Page(s):62-69
    • (2007) Computer , vol.40 , Issue.10 , pp. 62-69
    • Ramacher, U.1
  • 4
    • 85008020071 scopus 로고    scopus 로고
    • Khailany, B.K.; Williams, T.; Lin, J.; Long, E.P.; Rygh, M.; A Programmable 512 GOPS Stream Processor for Signal, Image, and Video Processing, Solid-State Circuits, IEEE Journal of 43, Issue 1, Jan. 2008 Page(s):202-213
    • Khailany, B.K.; Williams, T.; Lin, J.; Long, E.P.; Rygh, M.; "A Programmable 512 GOPS Stream Processor for Signal, Image, and Video Processing", Solid-State Circuits, IEEE Journal of Volume 43, Issue 1, Jan. 2008 Page(s):202-213
  • 5
    • 33846236435 scopus 로고    scopus 로고
    • Noda, H.; Nakajima, M.; Dosaka, K.; Nakata, K.; Higashida, M.; The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture, Solid-State Circuits, IEEE Journal of 42, Issue 1, Jan. 2007 Page(s):183-192
    • Noda, H.; Nakajima, M.; Dosaka, K.; Nakata, K.; Higashida, M.; "The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture", Solid-State Circuits, IEEE Journal of Volume 42, Issue 1, Jan. 2007 Page(s):183-192
  • 6
    • 0141942838 scopus 로고    scopus 로고
    • Reconfigurable computing systems
    • July Pages
    • Bondalapati, K.; Prasanna, V.K.; "Reconfigurable computing systems", Proceedings of the IEEE Volume 90, Issue 7, July 2002 Page(s):1201-1217
    • (2002) Proceedings of the IEEE , vol.90 , Issue.7 , pp. 1201-1217
    • Bondalapati, K.1    Prasanna, V.K.2
  • 7
    • 67249104256 scopus 로고    scopus 로고
    • http://www.xvid.org/
  • 8
    • 67249094217 scopus 로고    scopus 로고
    • http://www.realnetworks.com/
  • 9
    • 18844431614 scopus 로고    scopus 로고
    • DSP-based multi-format video decoding engine for media adapter applications
    • Feb, Pages
    • Yi-Shin Tung; Sung-Wen Wang; Chien-Wu Tsai; Ya-Ting Yang; "DSP-based multi-format video decoding engine for media adapter applications", Consumer Electronics, IEEE Transactions on Volume 51, Issue 1, Feb. 2005 Page(s):273-280
    • (2005) Consumer Electronics, IEEE Transactions on , vol.51 , Issue.1 , pp. 273-280
    • Tung, Y.-S.1    Wang, S.-W.2    Tsai, C.-W.3    Yang, Y.-T.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.