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Volumn 52, Issue 4, 2009, Pages 12-15

Precursors for group IV epitaxy for micro/opto-electronic applications

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL PRECURSORS; ELECTRONIC APPLICATION; EPITAXIAL DEPOSITION; MATERIAL SCIENTISTS; MATERIALS SCIENTIST; NEW MATERIAL; NON-TRADITIONAL; THERMAL BUDGET;

EID: 66249109923     PISSN: 0038111X     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Article
Times cited : (14)

References (8)
  • 1
    • 66249128310 scopus 로고    scopus 로고
    • T. Ghani et al., A 90nm high manufacturing logic technology featuring novel 45nm gate length strained silicon CMOS transistors, IEEE Int Elect. Dev. Mtg, 2003. p. 11.6.1.
    • T. Ghani et al., "A 90nm high volume manufacturing logic technology featuring novel 45nm gate length strained silicon CMOS transistors," IEEE Int Elect. Dev. Mtg, 2003. p. 11.6.1.
  • 2
    • 21644452652 scopus 로고    scopus 로고
    • Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing
    • H.S. Yang et al., "Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing," IEEE Int Elect. Dev. Mtg, 2004. p. 1075.
    • (2004) IEEE Int Elect. Dev. Mtg , pp. 1075
    • Yang, H.S.1
  • 3
    • 33847287986 scopus 로고    scopus 로고
    • Integration and optimization of embedded-sige, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
    • M. Horstmann et al., "Integration and optimization of embedded-sige, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies," IEEE Int Elect. Dev. Mtg, 2005. p. 233.
    • (2005) IEEE Int Elect. Dev. Mtg , pp. 233
    • Horstmann, M.1
  • 4
    • 33750690548 scopus 로고    scopus 로고
    • Mechanisms of stress generation within a polysilicon gate for nMOSFET performance enhancement
    • P. Morin et al., "Mechanisms of stress generation within a polysilicon gate for nMOSFET performance enhancement," Materials Science and Engineering: B, vol. 135, no. 3, 2006. p. 215.
    • (2006) Materials Science and Engineering: B , vol.135 , Issue.3 , pp. 215
    • Morin, P.1
  • 5
    • 63149106848 scopus 로고    scopus 로고
    • Si:CP Selective Epitaxial Growth in Recessed Source/Drain Regions yielding to Drive Current Enhancement in n-channel MOSFE
    • M. Bauer et al., "Si:CP Selective Epitaxial Growth in Recessed Source/Drain Regions yielding to Drive Current Enhancement in n-channel MOSFE" ECS Transactions, vol. 16, no. 10, 2008. p. 1001.
    • (2008) ECS Transactions , vol.16 , Issue.10 , pp. 1001
    • Bauer, M.1
  • 6
    • 36949002465 scopus 로고    scopus 로고
    • Epitaxy driven synthesis of elemental Ge/Si strain-engineered materials and device structures via designer molecular chemistry
    • Y-Y. Fang et al., "Epitaxy driven synthesis of elemental Ge/Si strain-engineered materials and device structures via designer molecular chemistry" Chem. Mater. Vol. 19, 2007. p. 5910.
    • (2007) Chem. Mater , vol.19 , pp. 5910
    • Fang, Y.-Y.1
  • 7
    • 34247264447 scopus 로고    scopus 로고
    • K. Chilukuri et al., Monolithic CMOS-compatible AlGaInP visible LED arrays on silicon on lattice-engineered substrates (SOLES), Semicond. Sci. Tech-nol. 22, 2007. p. 29-34.
    • K. Chilukuri et al., "Monolithic CMOS-compatible AlGaInP visible LED arrays on silicon on lattice-engineered substrates (SOLES)," Semicond. Sci. Tech-nol. 22, 2007. p. 29-34.
  • 8
    • 22944441602 scopus 로고    scopus 로고
    • Fabrication and Characterization of InGaP/GaAs Het-erojunction Bipolar Transistors on Germanium on Insulator (GOI) Substrates
    • S.G. Thomas, et al., "Fabrication and Characterization of InGaP/GaAs Het-erojunction Bipolar Transistors on Germanium on Insulator (GOI) Substrates," IEEE Elect. Dev. Lett., vol. 26, no. 7, 2005. p. 438.
    • (2005) IEEE Elect. Dev. Lett , vol.26 , Issue.7 , pp. 438
    • Thomas, S.G.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.