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Volumn 1066, Issue , 2008, Pages 261-264

Benefits of zero degree single wafer high energy implants for advanced semiconductor device fabrication

Author keywords

Inter well isolation; Shadowing effect; Zero degree implant

Indexed keywords


EID: 64849089520     PISSN: 0094243X     EISSN: 15517616     Source Type: Conference Proceeding    
DOI: 10.1063/1.3033608     Document Type: Conference Paper
Times cited : (1)

References (7)
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    • IEEE Trans. Manu. , vol.12 , Issue.4
    • Kapila, K.1    Jain, A.2    Nandakumar, M.3    Ashburn, S.4    Vasanth, K.5    Stridhar, S.6
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    • Novel substrate engineering for hogh performance CMOSFETs using channeling ion implantation
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    • (2003) SSDM , vol.728
    • Kitwaza, M.1    Yamashita, T.2    Kawasaki, Y.3    Kuroi, T.4    Eimori, T.5    Inuishi, M.6    Ohji, Y.7
  • 5
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  • 6
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    • Three-dimensional characterization of bipolar transistors in a submicron BiCMOS technology using integrated process and device simulation
    • M. R. Pinto, D. M. Boulin, C. S. Rafferty, R. K. Smith, W. M. Coughran, Jr., I. C. Kizilyalli, M. J. Thoma, "Three-dimensional characterization of bipolar transistors in a submicron BiCMOS technology using integrated process and device simulation", Proc IEDM-1992, 923-6 (1992).
    • (1992) Proc IEDM-1992 , pp. 923-926
    • Pinto, M.R.1    Boulin, D.M.2    Rafferty, C.S.3    Smith, R.K.4    Coughran, W.M.5    Kizilyalli, I.C.6    Thoma, M.J.7
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.