A Pthreads-based MPI-1 implementation for MMU-less machines

Proceedings - 2008 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2008

Volumn , Issue , 2008, Pages 277-282

  Rico Gallego, Juan A ^a   Álvarez Llorente, Jesús M ^a   Perogil Duque, Francisco J ^a   Antúnez Gómez, Pedro P ^a   Díaz Martín, Juan C ^a  

^a UNIVERSITY OF EXTREMADURA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER OPERATING SYSTEMS; DIGITAL SIGNAL PROCESSORS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MEMORY MANAGEMENT UNITS; PHYSICAL ADDRESSES; RECONFIGURABLE ARCHITECTURES; SIGNAL PROCESSING; SYSTEM-ON-CHIP;

DESIGN ISSUES; MEMORY FOOTPRINT; MICROBLAZE; NEW THREAD; PTHREADS; RECONFIGURABLE; TEXAS INSTRUMENTS; XILINX FPGA;

RECONFIGURABLE HARDWARE;

EID: 62349133041     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ReConFig.2008.24     Document Type: Conference Paper

References (17)

1. M. Saldana and P. Chow, "TMD-MPI: An MPI Implementation for Multiple Processors across Multiple FPGAs," in IEEE International Conference on Field-Programmable Logic and Applications (FPL), August 2006, pp. 329-334.
2. J. A. Williams, I. Syed, J. Wu, and N. W. Bergmann, "A Reconfigurable Cluster-on-Chip architecture with MPI Communication Layer," in 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2006, pp. 351-352.
3. Juan A. Rico Gallego, Jesús M. Álvarez Llorente, Juan C. Díaz Martín, Francisco Perogil Duque, "A Network Service for DSP Multicomputers", Lecture Notes in Computer Science, Springer, Volume 5022/2008. pp. 169-172.
4. http://www.sundance.com. Accesed 18th July 2008
5. http://www.31.com. Accesed 18th July 2008
6. N. Saint-Jean, G. Sassatelli, P. Benoit, L. Torres, and M. Robert, "HS-Scale: A hardware-software scalable MP-SOC architecture for embedded systems," IEEE Computer Society Annual Symposium on VLSI, 2007. ISVLSI'07, pp. 21-28, 2007
7. M. Saldana, D. Nunes, E. Ramalho, P. Chow, "Configuration and Programming of Heterogeneous Multiprocessors on a Multi-FPGA System Using TMD-MPI", 2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006) pp. 1-10.
8. http://www.proyecto-hesperia.org
9. J. A. Williams, N. W. Bergmann and R. F. Hodson, A Linux-based Software Platform for the Reconfigurable Scaleable Computing Project, 8th MAPLD International Conference, September 7-9, 2005.
10. http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux
11. S. G. Ziavrasa, A. V. Gerbessiotisb, R. Bafna, "Coprocessor design to support MPI primitives in configurable multiprocessors", Integration, the VLSI journal, Elsevier Science Publishers, Volume 40, Issue 3 (April 2007), pp. 235-252.
12. M. Scarpino, "Implementing the Message Passing Interface (MPI) with FPGAs s", 9th MAPLD International Conference, September 26-29, 2006.
13. http:/www.xilinx.com/support/documentation/ip-documentation/opb-timer.pdf
14. http://www.opencores.com.
15. H. Tang, K. Shen, and T. Yang, "Program Transformation and Runtime Support for Threaded MPI Execution on Shared Memory Machines". ACM Transactions on Programming Languages and Systems, Vol. 22, No. 4, Nov 2000, Pages 673-700.
16. E. D. Demaine, "A Threads-Only MPI Implementation for the Development of Parallel Programs," International Symposium on High Performance Computing Systems, July 1997, pp. 153-163.
17. Andrew D. Birrell, "Implementing Condition Variables with Semaphores". Technical Report. Microsoft Research - Silicon Valley January 2003.