A reconfigurable cluster-on-chip architecture with MPI communication layer

Proceedings - 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2006

Volumn , Issue , 2006, Pages 350-352

  Williams, J A ^a   Syed, I ^a   Wu, J ^a   Bergmann, N W ^a  

^a UNIVERSITY OF QUEENSLAND   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; INTERCONNECTION NETWORKS; MESSAGE PASSING; MICROPROCESSOR CHIPS; USER INTERFACES;

HARDWARE PROCESSING MODULES; HPC CLUSTER COMMUNITY; MULTI-CORE RECONFIGURABLE SYSTEMS;

MULTIPROCESSING SYSTEMS;

EID: 34547482559     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2006.14     Document Type: Conference Paper

References (3)

1. B. Wilkinson and M. Allen, Parallel Programming: techniques and applications using networked workstations and parallel computers: Prentice Hall, Inc., 1999.
2. MPI Forum, "MPI-2: Extensions to the MessagePassing Interface," online at http://www.mpiforum.org/docs/mpi-20-html/mpi2-report.html, accessed 15th Jan. 2005.
3. Xilinx Ine, "Virtex-4 ML401 Evaluation Platform," online at www.xilinx.com/m1401, accessed 15th Jan. 2006.