High-quality, deterministic parallel placement for FPGAs on commodity hardware

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2008, Pages 14-23

  Ludwin, Adrian ^a   Betz, Vaughn ^a   Padalia, Ketan ^a  

^a ALTERA CORPORATION   (Canada)

Author keywords

FPGAs; Parallel placement; Timing driven placement

Indexed keywords

CAD TOOL; COMMODITY HARDWARE; FOUR-CORE; FPGAS; HIGH QUALITY; MEMORY SUBSYSTEMS; MULTI CORE; PARALLEL PLACEMENT; PARALLELIZATION STRATEGIES; PROCESSING CORE; QUARTUS II; RUNTIMES; TIMING-DRIVEN PLACEMENT;

COMPUTER AIDED DESIGN; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LOGIC GATES; MICROPROCESSOR CHIPS; TIME MEASUREMENT;

PARALLEL ALGORITHMS;

EID: 59049095882     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1344671.1344676     Document Type: Conference Paper

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