CGMAP: A new approach to Network-on-Chip mapping problem

IEICE Electronics Express

Volumn 6, Issue 1, 2009, Pages 27-34

  Moein darbari, Fahime ^a   Khademzade, Ahmad ^b   Gharooni fard, Golnar ^a  

^a ISLAMIC AZAD UNIVERSITY   (Iran)

^b IRAN TELECOMMUNICATION RESEARCH CENTER   (Iran)

Author keywords

Chaos genetic algorithm; Mapping; Network on chip

Indexed keywords

ALGORITHMS; BUILDING MATERIALS; CHAOS THEORY; CHAOTIC SYSTEMS; CONFORMAL MAPPING; ELECTRIC NETWORK TOPOLOGY; GENETIC ALGORITHMS;

CHAOS-GENETIC ALGORITHM; ENERGY CONSUMPTION; HOP DISTANCES; MAPPING; MAPPING ALGORITHMS; MAPPING PROBLEMS; NETWORK-ON-CHIP; NEW APPROACHES; NOC ARCHITECTURES; NOVEL TECHNIQUES; PERFORMANCE INDEXES; SINGLE CHIPS; TASK GRAPHS;

ELECTRIC LOAD FORECASTING;

EID: 58849097536     PISSN: None     EISSN: 13492543     Source Type: Journal    
DOI: 10.1587/elex.6.27     Document Type: Article

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